somebody >> STR912 now uses RCLK if available.

somebody>> Could i ask why? Because using rclk is slower.

somebody>> Is it?

somebody>> it has been on all the interfaces i have tested over the years.

somebody>> Even arm and segger mention this in their docs, if you have a 
fast jtag tool
somebody>> in theory it should be as close to the max possible clock.  
in practice using
soembody>> correctly configured jtag clock has always been quicker.

I find the idea that "RTCK" is slower - to be dubious at best, perhaps 
better put like this:

Most of the time - in the jtag dongle - RTCK is implemented via software 
polling, and it ends up being slower. Adding a "timeout" in software 
(ie: in case the cable is not connected, or target is powered off) makes 
the software poll loop even slower. But - the vendor will not state 
that, or their little gadget does not support RTCK and they must cover 
this little problem up.

In contrast, a hardware based jtag (cpld, or fpga) could - theoretically 
run at lighting speed - and dynamically adjust to *ANY* target clock, 
and implement a small hardware timer to detect/error-on "stuck" signals.

Just what is the correct TCK vrs CPU-CLK ratio? I believe a simple 
statement of: 1/8 the CPU clock frequency is correct for ARM parts.  
yes, some parts, it could be faster. See below.

My reasoning comes from these schematics supplied by arm detailing how 
to hook up the ARM core to the jtag pins.

====

Example is here:
    ARM9EJ-S - TRM - Section 6.6.1 - Title: Clocks & Synchronization
    (ARM DDI 0222B)

    
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0222b/BABDHEIJ.html

Another example is here:
    ARM946 - TRM - ARM DDI 0201D    Figure 9.1

The ARM1136 - has a 4 stage RTCK
   ARM DDI0211I - Figure 14.2 - "Realview ICE Clock Synchronization"

====

Thus, the TCK -safe- Generic answer: 1/8 the CPU clock.
Some run faster - you have to look it up.

FYI  Xilinx data sheets state - TCK must be 1/12 the clock speed of the 
part.

Those that understand FPGA design and clock synch circuits could speak 
better to this then I can.

===

Interestingly - arm says this about cortex:

Specifically:  See ARM IHI 0031A - (Arm V5 debug) section 4.2.1

    "An implementation may also include a return clock signal RTCK.
    However ARM Limited recommends that RTCK is not implemented on an
    ARM debug interface".

Why? I have no idea - I think it is dumb because this means debugging a 
device with an adaptive clock (ie: a battery device that switches to 
32khz between key strokes) is painfully slow to debug.

perhaps - because so many jtag boxes do not support rtck, or do so wrong 
and poorly... that they have given up. I do not know.

-Duane.



 


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