On Fri, Oct 31, 2008 at 1:06 PM, Federico Spadini <[EMAIL PROTECTED]> wrote:
> Hi Guys,
>
> <sorry i zipped the log, it was too big to go on the list otherwise>
>
> I've recently built OpenOCD SVN version 1112 under Ubuntu Linux 8.04
> on AMD64 with the proper FTDI libraries. The target board is an iMote2

I'd like the imote2.cfg added to the target library. How is the attached patch?

> which consists of a PXA271 and an Intel Strataflash of 32 Megabytes
> (p30). I noticed a massive slow down between svn version 1109 and 1112
> using the same configurations, as well as an error (which does not
> occur in version 516 (in reality, this is the version which other
> users are currently using: I decided to try the bleeding edge and see
> if I could rig up a patch to release to the community)).

Are you saying that 1109 works?

If not, what is the last version of OpenOCD SVN that works?

Does 1036 work...? It messed around with the run_algorithm stuff....

Could you double check that there is a difference between 1109 and
1112 for your case. It doesn't make any sense based upon the changelog...

Also, I discovered some obsolete code for forcing breakpoints in xscale.c that
I've deleted in the attached patch.




-- 
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer
### Eclipse Workspace Patch 1.0
#P openocd
Index: src/target/xscale.c
===================================================================
--- src/target/xscale.c (revision 1064)
+++ src/target/xscale.c (working copy)
@@ -2152,9 +2152,6 @@
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       if (xscale->force_hw_bkpts)
-               breakpoint->type = BKPT_HARD;
-
        if (breakpoint->set)
        {
                LOG_WARNING("breakpoint already set");
@@ -2228,12 +2225,6 @@
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       if (xscale->force_hw_bkpts)
-       {
-               LOG_DEBUG("forcing use of hardware breakpoint at address 
0x%8.8x", breakpoint->address);
-               breakpoint->type = BKPT_HARD;
-       }
-
        if ((breakpoint->type == BKPT_HARD) && (xscale->ibcr_available < 1))
        {
                LOG_INFO("no breakpoint unit available for hardware 
breakpoint");
@@ -3090,8 +3081,6 @@
        xscale->hold_rst = 0;
        xscale->external_debug_break = 0;
 
-       xscale->force_hw_bkpts = 1;
-
        xscale->ibcr_available = 2;
        xscale->ibcr0_used = 0;
        xscale->ibcr1_used = 0;
@@ -3391,34 +3380,6 @@
        return ERROR_OK;
 }
 
-int xscale_handle_force_hw_bkpts_command(struct command_context_s *cmd_ctx, 
char *cmd, char **args, int argc)
-{
-       target_t *target = get_current_target(cmd_ctx);
-       armv4_5_common_t *armv4_5;
-       xscale_common_t *xscale;
-
-       if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK)
-       {
-               return ERROR_OK;
-       }
-
-       if ((argc >= 1) && (strcmp("enable", args[0]) == 0))
-       {
-               xscale->force_hw_bkpts = 1;
-       }
-       else if ((argc >= 1) && (strcmp("disable", args[0]) == 0))
-       {
-               xscale->force_hw_bkpts = 0;
-       }
-       else
-       {
-               command_print(cmd_ctx, "usage: xscale force_hw_bkpts 
<enable|disable>");
-       }
-
-       command_print(cmd_ctx, "force hardware breakpoints %s", 
(xscale->force_hw_bkpts) ? "enabled" : "disabled");
-
-       return ERROR_OK;
-}
 
 int xscale_handle_trace_buffer_command(struct command_context_s *cmd_ctx, char 
*cmd, char **args, int argc)
 {
Index: src/target/xscale.h
===================================================================
--- src/target/xscale.h (revision 1042)
+++ src/target/xscale.h (working copy)
@@ -37,7 +37,7 @@
        /* position in JTAG scan chain */
        int chain_pos;
 
-       /* IR length and instructions */        
+       /* IR length and instructions */
        int ir_length;
        u32 dbgrx;
        u32 dbgtx;
@@ -89,7 +89,7 @@
 typedef struct xscale_common_s
 {
        int common_magic;
-       
+
        /* XScale registers (CP15, DBG) */
        reg_cache_t *reg_cache;
 
@@ -97,31 +97,30 @@
        char *variant;
 
        xscale_jtag_t jtag_info;
-       
+
        /* current state of the debug handler */
        int handler_installed;
        int handler_running;
        u32 handler_address;
-       
+
        /* target-endian buffers with exception vectors */
        u32 low_vectors[8];
        u32 high_vectors[8];
-       
+
        /* static low vectors */
        u8 static_low_vectors_set;      /* bit field with static vectors set by 
the user */
        u8 static_high_vectors_set; /* bit field with static vectors set by the 
user */
        u32 static_low_vectors[8];
        u32 static_high_vectors[8];
 
-       /* DCache cleaning */   
+       /* DCache cleaning */
        u32 cache_clean_address;
-       
+
        /* whether hold_rst and ext_dbg_break should be set */
        int hold_rst;
        int external_debug_break;
-       
+
        /* breakpoint / watchpoint handling */
-       int force_hw_bkpts;
        int dbr_available;
        int dbr0_used;
        int dbr1_used;
@@ -130,23 +129,23 @@
        int     ibcr1_used;
        u32 arm_bkpt;
        u16 thumb_bkpt;
-       
+
        u8 vector_catch;
 
        xscale_trace_t trace;
-       
+
        int arch_debug_reason;
-       
+
        /* armv4/5 common stuff */
        armv4_5_common_t armv4_5_common;
-       
+
        /* MMU/Caches */
        armv4_5_mmu_common_t armv4_5_mmu;
        u32 cp15_control_reg;
-       
+
        /* possible future enhancements that go beyond XScale common stuff */
        void *arch_info;
-       
+
        int fast_memory_access;
 } xscale_common_t;
 
Index: src/target/target/imote2.cfg
===================================================================
--- src/target/target/imote2.cfg        (revision 0)
+++ src/target/target/imote2.cfg        (revision 0)
@@ -0,0 +1,24 @@
+# iMote2
+#
+# PXA271 and an Intel Strataflash of 32 Megabytes (p30)
+# 
+# Marvell/Intel PXA270 Script
+# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_nsrst_delay 800 
+# set the jtag_ntrst_delay to the delay introduced by a reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_ntrst_delay 0
+#use combined on interfaces or targets that can’t set TRST/SRST separately
+reset_config trst_and_srst separate
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 7 0x1 0x7f 0x7e
+target xscale little 0 pxa27x
+# maps to PXA internal RAM. If you are using a PXA255
+# you must initialize SDRAM or leave this option off
+working_area 0 0x5c000000 0x10000 nobackup
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+# works for P30 flash
+flash bank cfi 0x00000000 0x2000000 2 2 0
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