Little-endian mode. I can correctly access the ARM11 core via MAJIC JTAG
interface and Mentor's software. Only Olimex/openocd is giving me
trouble with 16-bit access.
I tried to configure openocd with big-endian but I get the same results
(32bit & 8bit work, 16bit return always 0x0000)
Attached is my config file.
--Michal
On Tue, 2009-08-04 at 00:08 +0200, Michael Schwingen wrote:
> michal smulski wrote:
> > I am using C100 (Mindspeed ARM11 dual core). I can correctly access
> > DDR2 and 16 bit flash on it via 8-bit and 32-bit commands (mdb,mdw) but
> > not 16-bit access.
> Are you running it in big or little endian mode?
>
> I did some work on that CPU some time ago, and ran into problems because
> there were some issues regarding big-endian support (I was using a
> BDI2000 at that time, not OpenOCD).
>
> I did not get to dig much deeper, because the project was cancelled, and
> there were some documentation updates later, so maybe this was just a
> documentation issue.
>
> cu
> Michael
>
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# c100 config
#
#jtag_nsrst_delay 5000
#jtag_ntrst_delay 3000
reset_config none
reset_config trst_and_srst separate
#reset_config trst_only
#reset_config trst_and_srst
#reset_config trst
#verify_jtag disable
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME c100
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# set _ENDIAN little
set _ENDIAN big
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x27b3645b
}
if { [info exists DSPTAPID ] } {
set _DSPTAPID $DSPTAPID
} else {
set _DSPTAPID 0x27b3645b
}
jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
$_DSPTAPID
# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
$_CPUTAPID
# No IDCODE for this TAP
#jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf
-expected-id 0x0
# Per section 40.17.1, table 40-85 the IR register is 4 bits
# But this conflicts with Diagram 6-13, "3bits ir and drs"
#jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
$_SDMATAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
proc power_restore {} { puts "Sensed power restore. No action." }
proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
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