hi,

I've tested 1 and 2 as Dirk suggested. With both versions I get the same results. I'm able to connect jtag consistently and from a telnet session issue the omap3_dbginit command. Lots of improvement from the last time I tried.

I try halt, resume, halt and that consistently produces a crash. The gdb of openocd and telnet session is attached, I did not try to debug this further.

fred

$gdb ./src/openocd 
GNU gdb 6.3.50-20050815 (Apple version gdb-966) (Tue Mar 10 02:43:13 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "i386-apple-darwin"...Reading symbols for shared 
libraries .... done

(gdb) run -s /Users/fred/Documents/openocd/2604/openocd/tcl -f 
interface/flyswatter.cfg -f board/ti_beagleboard.cfg
Starting program: /Users/fred/Documents/openocd/2604/openocd/src/openocd -s 
/Users/fred/Documents/openocd/2604/openocd/tcl -f interface/flyswatter.cfg -f 
board/ti_beagleboard.cfg
Reading symbols for shared libraries +++........ done
Open On-Chip Debugger 0.3.0-in-development (2009-08-25-19:51) svn:2604M
$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
For bug reports, read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS
OLD SYNTAX: DEPRECATED - use jtag_khz, not jtag_speed
jtag_speed: 1
Warn : huge IR length 38
Reading symbols for shared libraries . done
Info : device: 4 "2232C"
Info : deviceID: 67330064
Info : SerialNumber: FS000000 A
Info : Description: Flyswatter A
Info : clock speed 3000 kHz
Info : JTAG tap: omap3530.jrc tap/device found: 0x0b7ae02f (mfg: 0x017, part: 
0xb7ae, ver: 0x0)
Info : JTAG Tap/device matched
Info : accepting 'telnet' connection from 0
Info : JTAG tap: omap3530.jrc tap/device found: 0x0b7ae02f (mfg: 0x017, part: 
0xb7ae, ver: 0x0)
Info : JTAG Tap/device matched
    TargetName         Type       Endian TapName            State       
--  ------------------ ---------- ------ ------------------ ------------
 0* omap3.cpu          cortex_a8  little omap3530.dap       halted
....            
....            
     TapName            | Enabled |   IdCode      Expected    IrLen IrCap  
IrMask Instr     
---|--------------------|---------|------------|------------|------|------|------|---------
 0 | omap3530.dsp       |    n    | 0x00000000 | 0x00000000 | 0x26 | 0x25 | 
0x3f | 0xffffffff
 1 | omap3530.dap       |    Y    | 0x00000000 | 0x0b6d602f | 0x04 | 0x01 | 
0x0f | 0x0a
 2 | omap3530.jrc       |    Y    | 0x0b7ae02f | 0x0b7ae02f | 0x06 | 0x01 | 
0x3f | 0x3f
background polling: on
TAP: omap3530.dap (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: System and User
cpsr: 0x00000000 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
background polling: on
TAP: omap3530.dap (enabled)
target state: running
Error: invalid mode value encountered
Error: invalid mode value encountered
Error: invalid mode value encountered
Error: invalid mode value encountered

Program received signal EXC_BAD_ACCESS, Could not access memory.
Reason: KERN_INVALID_ADDRESS at address: 0x02644b74
0x000763cf in cortex_a8_debug_entry (target=0x219130) at cortex_a8.c:599
/Users/fred/Documents/openocd/2604/openocd/src/target/cortex_a8.c:599:18344:beg:0x763cf
(gdb) bt
#0  0x000763cf in cortex_a8_debug_entry (target=0x219130) at cortex_a8.c:599
#1  0x00077466 in cortex_a8_poll (target=0x219130) at cortex_a8.c:365
#2  0x0009098d in target_wait_state (target=0x219130, state=TARGET_HALTED, 
ms=7925724) at target.c:1942
#3  0x00090b1b in handle_wait_halt_command (cmd_ctx=0x210850, cmd=0x21b2e0 
"halt", args=0x22d7d4, argc=0) at target.c:1925
#4  0x00090bee in handle_halt_command (cmd_ctx=0x210850, cmd=0x21b2e0 "halt", 
args=0x22d7d4, argc=0) at target.c:1992
#5  0x000a8e73 in run_command (context=0x210850, c=0x0, words=0x22d7d0, 
num_words=1) at command.c:415
#6  0x000a90a0 in script_command (interp=0x201800, argc=1, argv=0xbfffeb94) at 
command.c:142
#7  0x000ba994 in Jim_EvalObj (interp=0x201800, scriptObjPtr=0x22d580) at 
jim.c:8708
#8  0x000bb74f in Jim_EvalCoreCommand (interp=0x201800, argc=3, 
argv=0xbfffec84) at jim.c:10846
#9  0x000ba994 in Jim_EvalObj (interp=0x201800, scriptObjPtr=0x22c080) at 
jim.c:8708
#10 0x000bb672 in Jim_CatchCoreCommand (interp=0x201800, argc=2, 
argv=0xbfffed74) at jim.c:11413
#11 0x000ba994 in Jim_EvalObj (interp=0x201800, scriptObjPtr=0x22be20) at 
jim.c:8708
#12 0x000c534b in Jim_EvalExpression (interp=0x201800, exprObjPtr=0x22bc10, 
exprResultPtrPtr=0xbfffeedc) at jim.c:6927
#13 0x000c5e48 in Jim_GetBoolFromExpr (interp=0x201800, exprObjPtr=0x78efdc, 
boolPtr=0xbfffef2c) at jim.c:7210
#14 0x000c5f83 in Jim_IfCoreCommand (interp=0x201800, argc=5, argv=0xbfffefb4) 
at jim.c:10297
#15 0x000ba994 in Jim_EvalObj (interp=0x201800, scriptObjPtr=0x215de0) at 
jim.c:8708
#16 0x000bb049 in JimCallProcedure (interp=0x201800, cmd=0x21b440, 
argc=2268480, argv=0xbffff0d4) at jim.c:8857
#17 0x000bad18 in Jim_EvalObj (interp=0x201800, scriptObjPtr=0x20f4c0) at 
jim.c:8714
#18 0x000bcdae in Jim_Eval_Named (interp=0x201800, script=0x78efdc <Address 
0x78efdc out of bounds>, filename=0xe4ee2 "command.c", lineno=469) at jim.c:8901
#19 0x000a8db9 in command_run_line (context=0x78efdc, line=0x808808 "halt") at 
command.c:469
#20 0x000a6e90 in telnet_input (connection=0x220d60) at telnet_server.c:330
#21 0x000a5b99 in server_loop (command_context=0x2017e0) at server.c:433
#22 0x0000218b in openocd_main (argc=7925724, argv=0x78efdc) at openocd.c:283
#23 0x00001ad6 in start ()
(gdb) print armv4_5
$1 = (armv4_5_common_t *) 0x21ae5c
(gdb) print *armv4_5
$2 = {
  common_magic = 172296773, 
  core_cache = 0x216740, 
  core_mode = 0, 
  core_state = ARMV4_5_STATE_ARM, 
  full_context = 0, 
  read_core_reg = 0x77500 <cortex_a8_read_core_reg>, 
  write_core_reg = 0x756f0 <cortex_a8_write_core_reg>, 
  arch_info = 0x21addc
}
(gdb) print i
$3 = <value temporarily unavailable, due to optimizations>
(gdb) 



fred-koehlers-macbook:~ fred$ telnet localhost 4444
Trying ::1...
telnet: connect to address ::1: Connection refused
Trying fe80::1...
telnet: connect to address fe80::1: Connection refused
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> omap3_dbginit
JTAG tap: omap3530.jrc tap/device found: 0x0b7ae02f (mfg: 0x017, part: 0xb7ae, 
ver: 0x0)
JTAG Tap/device matched
    TargetName         Type       Endian TapName            State       
--  ------------------ ---------- ------ ------------------ ------------
 0* omap3.cpu          cortex_a8  little omap3530.dap       halted
0x54011314 00000009                            ....            
0x54011314 00000001                            ....            
> scan_chain
     TapName            | Enabled |   IdCode      Expected    IrLen IrCap  
IrMask Instr     
---|--------------------|---------|------------|------------|------|------|------|---------
 0 | omap3530.dsp       |    n    | 0x00000000 | 0x00000000 | 0x26 | 0x25 | 
0x3f | 0xffffffff
 1 | omap3530.dap       |    Y    | 0x00000000 | 0x0b6d602f | 0x04 | 0x01 | 
0x0f | 0x0a
 2 | omap3530.jrc       |    Y    | 0x0b7ae02f | 0x0b7ae02f | 0x06 | 0x01 | 
0x3f | 0x3f
> halt
> poll
background polling: on
TAP: omap3530.dap (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: System and User
cpsr: 0x00000000 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> resume
> poll
background polling: on
TAP: omap3530.dap (enabled)
target state: running
> halt
invalid mode value encountered
invalid mode value encountered
invalid mode value encountered
invalid mode value encountered


On Aug 25, 2009, at 7:26 AM, Dirk Behme wrote:


Let's try to organize this a little and summarize the status:

1. Last time I tried was *r2604*:

https://lists.berlios.de/pipermail/openocd-development/2009-August/010035.html

To reproduce this, you have to apply the four patches in attachment of that mail to r2604.

Fred and Matt: Please try to exactly reproduce this and in case of differences or other issues, send detailed report.

Matt: As you can see in above mail, halt and resume seem to work there.

2. When we agree on status of (1), then it's time to test recent trunk. As Øyvind mentioned in

https://lists.berlios.de/pipermail/openocd-development/2009-August/010073.html

he applied 3 of 4 patches from (1) (thanks!). To test this, we have to apply remaining patch (attachment) and test if result is the same like in (1). I did so and got the same result as in (1) with *r2619* and single patch in attachment.

Fred and Matt: Please try to exactly reproduce this and in case of differences or other issues, send detailed report.

3. When we agree on (1) and (2), the further steps could be:

a) Review/fix/rewrite remaining patch to get it applied. Dave's recent version of this patch is in

https://lists.berlios.de/pipermail/openocd-development/2009-August/010041.html

btw (see attachment, too).

b) Fix the issues mentioned in (1):

- Fix "OLD SYNTAX: DEPRECATED - use jtag_khz, not jtag_speed"

- Fix "invalid mode value encountered" warnings

- Fix "soft_reset_halt" segfault

- Update eLinux OpenOCD Beagle page

- ...

Best regards

Dirk

Matt Hsu wrote:
Øyvind Harboe wrote:
Did you try with the patches I committed today?

   Hi Øyvind,
   Thanks for your reply.
   Yes. I applied the patch your committed. It definitely works.
   The jtag session could be established.
The problem is I would like to issue commands such as reset halt, bp, resume.
   The source code shown their implementation are NULL.
   So I'm curious why coretex_a8 does not have these support?
   Or why Magnus's patches were not merged?
   Cheers,
   Matt



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---
src/jtag/core.c |    8 ++++++++
1 file changed, 8 insertions(+)

--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -469,6 +469,14 @@ void jtag_add_tlr(void)
{
   jtag_prelude(TAP_RESET);
   jtag_set_error(interface_jtag_add_tlr());
+
+   /*
+    * Add a bunch of clocks after TLR entry to force SWD reset (newer
+    * ARM cores; just in case, ~50 cycles), switch on ICEpick power
+    * domains (for some TI parts, ~100 cycles), etc
+    */
+   jtag_set_error(interface_jtag_add_runtest(100, TAP_RESET));
+
   jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
}

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