--- b/src/target/arm920t.c 2009-11-04 22:01:14.000000000 +0800
+++ a/src/target/arm920t.c 2009-11-04 21:30:51.000000000 +0800
@@ -552,12 +552,9 @@
arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
arm920t_common_t *arm920t = arm9tdmi->arch_info;
- if ((retval = arm7_9_write_memory(target, address, size, count,
buffer)) != ERROR_OK)
- return retval;
-
/* This fn is used to write breakpoints, so we need to make sure that
the
* datacache is flushed and the instruction cache is invalidated */
- if (((size == 4) || (size == 2)) && (count == 1))
+ if (arm920t->armv4_5_mmu.mmu_enabled && (count == 1) && ((size==2) ||
(size==4)))
{
if (arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled)
{
@@ -568,13 +565,28 @@
return retval;
}
- if (arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled)
- {
- LOG_DEBUG("I-Cache enabled, invalidating affected I-Cache
line");
- retval = arm920t_write_cp15_interpreted(target, 0xee070f35,
0x0, address);
- if (retval != ERROR_OK)
- return retval;
- }
+ uint32_t pa, cb, ap;
+ int type, domain;
+
+ pa = armv4_5_mmu_translate_va(target, &arm920t->armv4_5_mmu,
address, &type, &cb, &domain, &ap);
+ if (type == -1)
+ return ERROR_OK;
+ /* cacheable & bufferable means write-back region */
+ if (cb == 3)
+ armv4_5_mmu_write_physical(target, &arm920t->armv4_5_mmu, pa,
size, count, buffer);
+ } else
+ {
+ if ((retval = arm7_9_write_memory(target, address, size, count,
buffer)) != ERROR_OK)
+ return retval;
+ }
+
+
+ if (arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled)
+ {
+ LOG_DEBUG("I-Cache enabled, invalidating affected I-Cache line");
+ retval = arm920t_write_cp15_interpreted(target, 0xee070f35, 0x0,
address);
+ if (retval != ERROR_OK)
+ return retval;
}
return retval;
2009/11/4 Øyvind Harboe <oyvind.har...@zylin.com>
> On Wed, Nov 4, 2009 at 4:24 AM, Dennis.Cheng <m8939...@gmail.com> wrote:
> > In arm920t_write_memory, how about imitate arm926ejs_write_memory?
>
> Could you submit a patch?
>
> I tried to make minimal changes before 0.3, but as soon as 0.3 is out
> of the door I'd like arm920t to support breakpoints in memory
> marked as read only by the MMU.
>
> If you want to be a bit more ambitious it would be nice if you wrote
> an implementation that could be shared between arm920t and arm926ejs...
>
> --
> Øyvind Harboe
> http://www.zylin.com/zy1000.html
> ARM7 ARM9 ARM11 XScale Cortex
> JTAG debugger and flash programmer
>
arm920t.patch
Description: Binary data
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