Those few targets that have problems with fast_memory_access
or dcc_downloads must add event handlers to the reset sequence
to deal with this. The typical example are CPUs that run
at kHz clocks.
Signed-off-by: Øyvind Harboe <oyvind.har...@zylin.com>
---
doc/openocd.texi | 15 ++++++++++-----
src/target/arm7_9_common.c | 8 ++++----
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/doc/openocd.texi b/doc/openocd.texi
index ea30092..43ea0d8 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5642,18 +5642,23 @@ including ARM9TDMI, ARM920T, and ARM926EJ-S.
@deffn Command {arm7_9 dcc_downloads} (@option{enable}|@option{disable})
@cindex DCC
-Control the use of the debug communications channel (DCC) to write larger
(>128 byte)
+Enabled by default. Control the use of the debug communications channel (DCC)
to write larger (>128 byte)
amounts of memory. DCC downloads offer a huge speed increase, but might be
-unsafe, especially with targets running at very low speeds. This command was
introduced
-with OpenOCD rev. 60, and requires a few bytes of working area.
+unsafe, especially with targets running at very low speeds. This command
requires
+a few bytes of working area. This is implemented as an open loop where
+OpenOCD pours data into the target. If the target is not able to keep
+up, then OpenOCD will print an error message after the transfer
+from OpenOCD is complete.
@end deffn
@anchor{arm7_9 fast_memory_access}
@deffn Command {arm7_9 fast_memory_access} (@option{enable}|@option{disable})
-Enable or disable memory writes and reads that don't check completion of
+Enabled by default. Enable or disable memory writes and reads that don't check
completion of
the operation. This provides a huge speed increase, especially with USB JTAG
cables (FT2232), but might be unsafe if used with targets running at very low
-speeds, like the 32kHz startup clock of an AT91RM9200.
+speeds, like the 32kHz startup clock of an AT91RM9200. Targets that
+require such low speeds during reset, will have to add reset event
+handlers to turn this option off temporarily.
@end deffn
@subsection ARM720T specific commands
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index b5553cd..5438855 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2828,8 +2828,8 @@ int arm7_9_init_arch_info(struct target *target, struct
arm7_9_common *arm7_9)
arm7_9->wp_available_max = 2;
- arm7_9->fast_memory_access = false;
- arm7_9->dcc_downloads = false;
+ arm7_9->fast_memory_access = true;
+ arm7_9->dcc_downloads = true;
armv4_5->arch_info = arm7_9;
armv4_5->read_core_reg = arm7_9_read_core_reg;
@@ -2858,14 +2858,14 @@ static const struct command_registration
arm7_9_any_command_handlers[] = {
.mode = COMMAND_ANY,
.usage = "<enable|disable>",
.help = "use fast memory accesses instead of slower "
- "but potentially safer accesses",
+ "but potentially safer accesses. Enabled by default.",
},
{
"dcc_downloads",
.handler = &handle_arm7_9_dcc_downloads_command,
.mode = COMMAND_ANY,
.usage = "<enable | disable>",
- .help = "use DCC downloads for larger memory writes",
+ .help = "use DCC downloads for larger memory writes. Enabled by
default.",
},
COMMAND_REGISTRATION_DONE
};
--
1.6.3.3
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