On Wednesday 20 January 2010, Edgar Grimberg wrote: > $ git bisect bad > 5eb893ec41c8c6cf6499558b6fed826b65e18a16 is first bad commit > commit 5eb893ec41c8c6cf6499558b6fed826b65e18a16 > Author: David Brownell <dbrown...@users.sourceforge.net> > Date: Tue Nov 24 01:27:16 2009 -0800 > > ARM11: partial support for standard ARM register interfaces. > > This provides "standard" ARM register support -- with twenty or > more shadow registers on top of what this code now handles, but > properly associated with the various core modes -- parallel to > the current register code. That is, the current code is stilil > managing the "current" registers; the new code shadows them.
Do you happen to have a theory for how a patch that doesn't touch breakpoint logic would cause breakpoint failures? My first reaction is to suspect: > So it's not a full migration, there are warts -- every place that > touches the old register cache is a potential bug -- but it's a > small more-or-less-comprehensible step that's even somewhat useful. > Later patches complete the migration. and want to see what a bisection that skips known-incomplete stuff will turn up. - Dave _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
