On 04/06/2010 10:35, Xiaochen Zhou wrote: >> >> It seems some issues in openocd-0.4.0 with MIPS 4KEc core, I did some >> experiments below: >> > >For info the MIPS has been mainly tested on a m4k (aka PIC32). >This also means that testing has been on a little endian system, so bugs >could be present. > >> Issue 1: >> In telnet console, I set the breakpoint at 0x80000000, when I dump >> memory in uboot, the SDBBP(software debug breakpoint) in memory is >> 0x3F000070 not 0x7000003F, so it's endian issue. >> I modify src/target/mips32.h >> line 138: #define MIPS32_SDBBP 0x7000003F ------> #define MIPS32_SDBBP >> 0x3F000070 >> then it's ok in uboot memory dump. >> > >target_write_u32 should write to the target in the correct endian.
Endianess on MIPS may give a headache. The problem is that only the data is shuffled, the code stays in the same order. If you set OpenOCD to big endian it will shuffle both code and data. Nico Coesel _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
