Hi,
This patch allows a board script to specify the CPU clock of the LPC2478 target.
The clock frequency used to be fixed to 4 MHz. However, there is no default
frequency for this CPU. You mustn't assume prior knowledge of the clock
frequency, but rather demand that the user (board script) specifies it.
This clock frequency is the CPU clock at the time of flash programming! Usually
board scripts will enable the PLL to speed up debugging/programming. This MUST
be the correct frequency, or flash programming will fail or produce unreliable
results.
This will break all LPC2478 board or user scripts. Users must add the intended
operating clock frequency before they include the target script:
> set CCLK 72000
> source [find target/lpc2478.cfg]
Regards,
Rolf
From 0b314d0bcbdedfc3ef8ec8dacf97e1f8ad2d5ac8 Mon Sep 17 00:00:00 2001
From: Rolf Meeser <rolfm_...@yahoo.de>
Date: Fri, 3 Dec 2010 14:10:40 +0100
Subject: [PATCH 5/5] lpc2478 target config: CCLK as (mandatory) parameter
---
tcl/target/lpc2478.cfg | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index df46c10..1e11d9e 100644
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -12,6 +12,12 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x4f1f0f0f
}
+if { [info exists CCLK ] } {
+ set _CCLK $CCLK
+} else {
+ error "You must specify the CCLK that will be used for flash programming!"
+}
+
#delays on reset lines
adapter_nsrst_delay 100
jtag_ntrst_delay 100
@@ -35,10 +41,7 @@ $_TARGETNAME configure -event reset-init {
}
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
-# After reset the chip uses its internal 4MHz RC oscillator.
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
+flash bank $_FLASHNAME lpc2000 0x0 0x7E000 0 0 $_TARGETNAME lpc2000_v2 $_CCLK calc_checksum
-# Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
-jtag_rclk 500
--
1.7.2.3
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