On 04/27/2011 03:12 PM, Eric Cooper wrote:
>
> I'm using:
>     GNU gdb (Sourcery G++ Lite 2010q1-188) 7.0.50.20100218-cvs
>
>> BTW, be careful using openocd through telnet while gdb is connected.  Openocd
>> assumes exclusive use of one or the other, and does things like clear all
>> existing breakpoints when gdb connects.  It could be confusing the issue for 
>> you.
> I tried with no telnet client connected, just gdb, and got the same behavior.
> Maybe I'll have to run arm-gdb under gdb to find out what's going on ...

Probably would be easier to debug this by seeing if the openocd gdb server is
getting the appropriate message from gdb when you hit ^c.  Don't know too much
about this code myself.
 
>
>> Have you tried hardware breakpoints as well?
> Yes, apparently that doesn't work on this chip:
>     Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit
> When I try, I get this:
>
>> bp 0x07f7c2e4 4 hw
> no watchpoint unit available for hardware breakpoint
> can't add breakpoint: resource not available

If that's the only hw bp you set, then the messages seem contradictory.  Maybe
someone with knowledge of openocd code for this arch can help.

>> You should be able to verify that the software breakpoint was
>> succesfully inserted by doing a 'mdw' or 'arm disassemble' at the
>> breakpoint address and seeing if the original instruction was
>> replaced with the bkpt instruction.
> It all seems OK:
>
> I think it must still be executing the unmodified instruction out of
> the i-cache.  Shouldn't openocd flush that when it sets a software
> breakpoint?

Yes, 'should' being the operative word.  If you're sure that the execution path
passes through this instruction, then yes, icache not being flushed is the
likely explanation.  I had to fix the same problem on xscale a while back.  Not
sure of the status on arm7_9.  Again, maybe someone knowledgeable can chime in. 
Wish I could help more.  Maybe one day I'll graduate past armv5 :-)

Mike

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