hi,
I found the PLL and SDRAM initialization code from the start.S file in
the example ADS project of the CD-ROM it provided.
I am in Windows now and playing with my new Freescale PowerQUICC board
:) I will publish my configuration file tonight(GMT + 8).
On 100/5/30 上午 11:29, Rogan Dawes wrote:
On 2011/05/30 5:22 AM, Bear wrote:
hi,
I have solved that problem and you are right, it is a PLL configuration
problem.
Now both J-Link and OpenJTAG can work well on my uptech 2410 with my new
configuration file. But wiggler still cannot "reset halt" my board.
Thanks for your help!
Hi,
Can you explain how you fixed the PLL? I seem to have the same problem
with my JLink (clone) adapter, and a DNS323 (Orion5x) board.
Thanks
Rogan
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