Hi all,
any responses on this ?

MIPS32 target is currently broken for soft breakpoint handling :
reading of the original instruction swaps the bytes, so
breakpoint->orig_instr is badly recorded. Reading of the current
instruction does this also, so we never read MIPS32_SDBBP needed for
OpenOCD to break.

I am crafting the complete patch that will fix these issues, but I
would like to here some responses...

BR,
Drasko


On Wed, Jun 29, 2011 at 2:47 PM, Drasko DRASKOVIC
<drasko.drasko...@gmail.com> wrote:
> Hi all,
> I have additional questions about target_read_memory() and
> target_read_u32() used to set/unset breakpoints.
>
> I can see that target_read_memory() simply calls
> mips_m4k_write_memory() and since I have big endian MIPS target, bytes
> are not swapped.
>
> However, target_read_u32(), besides calling target_read_memory(), it
> also swappes the bytes returned (I pasetd the function definition
> below).
>
>
> Would that mean that all the time when we want to read 4 or 2 bytes
> values, like breakpoints instructions, we must *always* use
> target_read_u32 and target_read_u16, and never target_read_memory() ?
>
> If answer is yes, I'll change rest of the file where this should be
> done, and post more complete patch.
>
> Best regards,
> Drasko
>
>
>
>
> int target_read_u32(struct target *target, uint32_t address, uint32_t *value)
> {
>        uint8_t value_buf[4];
>        if (!target_was_examined(target))
>        {
>                LOG_ERROR("Target not examined yet");
>                return ERROR_FAIL;
>        }
>
>        int retval = target_read_memory(target, address, 4, 1, value_buf);
>
>        if (retval == ERROR_OK)
>        {
>                *value = target_buffer_get_u32(target, value_buf);
>                LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx32 "",
>                                  address,
>                                  *value);
>        }
>        else
>        {
>                *value = 0x0;
>                LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
>                                  address);
>        }
>
>        return retval;
> }
>
> On Mon, Jun 27, 2011 at 8:31 PM, Drasko DRASKOVIC
> <drasko.drasko...@gmail.com> wrote:
>> Hi all,
>> I've noticed that unsetting soft breaks is currently broken on BE MIPS
>> 4Kc targets.
>>
>> This patch fix it by using target_read_u32() and target_read_u16()
>> instead of target_read_memory().
>>
>> BR,
>> Drasko
>>
>
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