Hi all, I have a following problem : I have a slave CPU which is under constant reset in a multicore SoC. This slave CPU is woken up by the write to certain register bu main CPU. Then reset from slave CPU is removed and it can be halted, written to, etc.
My problem is that I created two targets in my OpenOCD config, but when I say halt or reset init in my script it tries to halt both targets - so it fails. Reset init is never done, so SDRAM is not set up. What would be the best place -the best event - to put there this slave reset register write ? I tried defining -event reset-start, reset-init and reset-assert to contain this reg write - no sucess. It seems like OpenOCD still tries to halt both targets before doing reset. So I inserted this reg write into -event halted. THis works but seems to be impractical - I'll have this regiter written on every halt, and I want to have it written only after SoC reset, but before first halt was issued (otherwise halt will fail, because slave CCPU will stay under reset until waken-up by main CPU)... BR, Drasko _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
