It usually takes from 5 to 10 years after something new is released before all your tools support it.
John Eaton On Tue, Apr 10, 2012 at 1:33 PM, Olof Kindgren <olof.kindg...@orsoc.se>wrote: > > > 2012/4/6 R. Diez <rdiezmail-openr...@yahoo.de> > > Hi Julius: >> >> > [...] >> >> This is a good exercise, thanks for having a go. I recall I did a bit >>> of linting a while back and got through the CPU and Mohor debug IF. >>> Note that I believe there's still a couple of Verilator lint-off >>> directive comments in the code here and there. >>> >> > [...] >> >> In order to get started, could you take a look at my first suggestion? >> Here it is again: >> >> --------8<--------8<-------- >> >> For example, I'm getting this warning for the OpenRISC core >> included in ORPSoC2: >> >> %Warning-DECLFILENAME: rtl/verilog/or1200/or1200_fpu_** >> intfloat_conv.v:323: >> Filename 'or1200_fpu_intfloat_conv' does not match MODULE name: >> or1200_fpu_intfloat_conv_**except >> >> Could you move module 'or1200_fpu_intfloat_conv_**except' to a new file >> called 'or1200_fpu_intfloat_conv_**except'? I've tried that locally and >> it >> works. Alternatively, that module could be defined as a submodule of the >> main one, but that's only available for SystemVerilog (2005). Do we need >> to support older Verilog standards? >> --------8<--------8<-------- >> >> Thanks in advance, >> >> Ruben >> ______________________________**_________________ >> OpenRISC mailing list >> OpenRISC@lists.openrisc.net >> http://lists.openrisc.net/**listinfo/openrisc<http://lists.openrisc.net/listinfo/openrisc> >> > > We absolutely need to support older verilog standards for now. The > SystemVerilog support is still very new in many tools. In a few years > though, we should make sure to move to SV. It would help us clean up a lot > of messy code. > > -- > Olof Kindgren > ______________________________________________ > ORSoC > Website: www.orsoc.se > Email: olof.kindg...@orsoc.se > ______________________________________________ > FPGA, ASIC, DSP - embedded SoC design > > _______________________________________________ > OpenRISC mailing list > OpenRISC@lists.openrisc.net > http://lists.openrisc.net/listinfo/openrisc > >
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