Hi All,
I found the Solaris x86 has the real implementation for store
instruction ordering,
x64,
ENTRY(membar_producer)
sfence
ret
SET_SIZE(membar_producer)
x32,
ENTRY(membar_producer)
.globl _patch_sfence_ret
_patch_sfence_ret: /* c.f. membar #StoreStore */
lock
xorl $0, (%esp)
ret
SET_SIZE(membar_producer)
But I was told that x86 architecture always enforces ordered writes.
If that is true, should we have an empty membar_producer routine?
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