On Tue, 21 Dec 2004, Andy Polyakov wrote:

> > > SHA-1: Dean already worked on this, using SSE2.
> 
> So far Dean has been working on 32-bit codes. The reason he refers to Opteron
> is rather because it's another SSE2-capable CPU to compare with, than 64-bit
> one. Right?

right -- i was just trying all SSE2-capable CPUs.


> > > My first step will be to study the only existing AMD64 implementation of
> > > AES: loop-aes, merged in Linux kernel 2.6.8-rc3 by Brian Gladman.
> > 
> > yeah gladman aes is the way to go ...  the gladman code and linux-kernel
> > variations on it
> 
> Keep in mind that [unlike Gladman's code] OpenSSL code has to be position
> independent! It surely no problem on x86_64, but on x86 this puts you in very
> tight spot. But I've sketched some 32-bit PIC code already [as previously
> mentioned "I might have an opportunity to play with AES some day *this*
> year"], so give me few more days...

oh i guess you need to throw away another register on 32-bit x86 to load 
up the table base address.

you know -- the gladman code uses %ebp to point at the 
key-schedule/context... perhaps if you copied the key-schedule/context to 
the stack you could refer to it off %esp, and then use %ebp as a base 
register for the tables?  it would pay if you can amortize the stack copy 
over multiple blocks...


> > i know how i could do a better job natively on efficeon using tables only
> > twice as large as gladman, but that's also "breaking the rules" :)
> 
> Huh? Is it possible to reach for native instruction set on Transmeta 
> CPUs? I was under impression that it was not possible... A.

i work at transmeta, so like i said it's "breaking the rules".  efficeon 
does well enough on the gladman code though, so a native implementation is 
really only of educational purposes.  (i.e. to demonstrate ways we might 
want to improve our translator.)  i made a 10% to 20% improvement in this 
area between cms 6.0.x (shipping now) and 6.1.x (shipping soon).

-dean
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