Hi Jakob, Can you please give me some reference/example of bignum optimization which I can check on powerpc architectures. Is this any specific instruction set addition? or something more generic?
Thanks & Regards Mithun On Tue, Jan 17, 2017 at 9:38 PM, Jakob Bohm <jb-open...@wisemo.com> wrote: > On 17/01/2017 07:44, Mithun P wrote: > >> Hi >> >> I have a embedded board P1010 RDB running openssl on VXWORKS 5.4 . >> I am generating RSA 2048 and 3072 bit key pairs. >> I am providing entropy to openssl by using RAND_seed from a HW RNG. >> >> My average generation time for RSA 2048 key pair is 2 Minutes and 3072 >> is 8 minutes. >> Is there a way to reduce the generation time? >> >> I believe this is a CPU intensive operation (if VxWorks can do > this, try observing the CPU load during). > > Potential improvements: > > 1. Check if the CPU specific bignum optimizations for your CPU > variant have been enabled via the libcrypto CPU detection code > (for example, there are optimizations for different ARM cortex > variants). > 2. Faster CPU (expensive obviously). > 3. Do the generation in the background before the keypair is > needed, at a time when the extra CPU load is less of a problem. > > > Enjoy > > Jakob > -- > Jakob Bohm, CIO, Partner, WiseMo A/S. https://www.wisemo.com > Transformervej 29, 2860 Søborg, Denmark. Direct +45 31 13 16 10 > This public discussion message is non-binding and may contain errors. > WiseMo - Remote Service Management for PCs, Phones and Embedded > > -- > openssl-users mailing list > To unsubscribe: https://mta.openssl.org/mailman/listinfo/openssl-users >
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