Am 04.08.2015 um 16:18 schrieb Guillaume Gardet:
> Le 04/08/2015 16:13, Andreas Färber a écrit :
>> Hi Guillaume,
>>
>> Am 04.08.2015 um 15:25 schrieb Guillaume Gardet:
>>> you submitted u-boot patches for Jetson TK1 against 2015.07 version. I
>>> want to update to 2015.10-rc1 but your patches does not apply anymore.
>>> Probably because of tegra 210 addition.
>>>
>>> Could you provide an updated version of your patches against my home
>>> project, please?
>>> https://build.opensuse.org/package/show/home:Guillaume_G:branches:Base:System/u-boot
>>>
>> Please feel free to just submit with them disabled/dropped for now.
>
> It can wait for a few hours/days. ;)
>
>>
>> I'll look into rebasing them tonight, if Alexandre isn't quicker.
>
> ok.
There's a conflict in u-boot.changes, so I'm attaching the updated
patches untested (backported from u-boot-tegra.git next).
Regards,
Andreas
--
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GF: Felix Imendörffer, Jane Smithard, Dilip Upmanyu, Graham Norton; HRB
21284 (AG Nürnberg)
>From 5f49fb7ed89bd75e77bda5353877e85fbe921866 Mon Sep 17 00:00:00 2001
From: Alexandre Courbot <acour...@nvidia.com>
Date: Thu, 9 Jul 2015 16:33:00 +0900
Subject: [PATCH 1/2] ARM: tegra: move VPR configuration to a later stage
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().
Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
Cc: Stephen Warren <swar...@nvidia.com>
Cc: Tom Warren <twar...@nvidia.com>
Signed-off-by: Tom Warren <twar...@nvidia.com>
(cherry picked from commit bd2787143ef5f73d74c8376e32d38ec05b712162)
Signed-off-by: Andreas Färber <afaer...@suse.de>
---
arch/arm/include/asm/arch-tegra/ap.h | 9 ---------
arch/arm/include/asm/arch-tegra/gpu.h | 27 +++++++++++++++++++++++++++
arch/arm/mach-tegra/Makefile | 4 +---
arch/arm/mach-tegra/ap.c | 3 ---
arch/arm/mach-tegra/board2.c | 3 +++
arch/arm/mach-tegra/{vpr.c => gpu.c} | 18 +++++++++++++++---
include/configs/tegra124-common.h | 3 +++
include/configs/tegra210-common.h | 3 +++
8 files changed, 52 insertions(+), 18 deletions(-)
create mode 100644 arch/arm/include/asm/arch-tegra/gpu.h
rename arch/arm/mach-tegra/{vpr.c => gpu.c} (80%)
diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index 76773b7..8c2586c 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -64,15 +64,6 @@ int tegra_get_sku_info(void);
/* Do any chip-specific cache config */
void config_cache(void);
-#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210)
-/* Do chip-specific vpr config */
-void config_vpr(void);
-#else
-static inline void config_vpr(void)
-{
-}
-#endif
-
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
bool tegra_cpu_is_non_secure(void);
#endif
diff --git a/arch/arm/include/asm/arch-tegra/gpu.h b/arch/arm/include/asm/arch-tegra/gpu.h
new file mode 100644
index 0000000..b347a21
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/gpu.h
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2015
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_TEGRA_GPU_H
+#define __ASM_ARCH_TEGRA_GPU_H
+
+#if defined(CONFIG_TEGRA_GPU)
+
+void config_gpu(void);
+bool gpu_configured(void);
+
+#else /* CONFIG_TEGRA_GPU */
+
+static inline void config_gpu(void)
+{
+}
+
+static inline bool gpu_configured(void)
+{
+ return false;
+}
+
+#endif /* CONFIG_TEGRA_GPU */
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 0db8ee0..75924ad 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -24,9 +24,7 @@ obj-y += pinmux-common.o
obj-y += powergate.o
obj-y += xusb-padctl.o
obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
-#TCW Fix this to use a common config switch (CONFIG_LOCK_VPR?)
-obj-$(CONFIG_TEGRA124) += vpr.o
-obj-$(CONFIG_TEGRA210) += vpr.o
+obj-$(CONFIG_TEGRA_GPU) += gpu.o
obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index e62dda5..b4229f4 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -226,8 +226,5 @@ void s_init(void)
/* enable SMMU */
smmu_enable();
-
- /* init vpr */
- config_vpr();
}
#endif
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 36bcfb0..4e73d1a 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -29,6 +29,7 @@
#include <asm/arch-tegra/sys_proto.h>
#include <asm/arch-tegra/uart.h>
#include <asm/arch-tegra/warmboot.h>
+#include <asm/arch-tegra/gpu.h>
#ifdef CONFIG_TEGRA_CLOCK_SCALING
#include <asm/arch/emc.h>
#endif
@@ -125,6 +126,8 @@ int board_init(void)
clock_init();
clock_verify();
+ config_gpu();
+
#ifdef CONFIG_TEGRA_SPI
pin_mux_spi();
#endif
diff --git a/arch/arm/mach-tegra/vpr.c b/arch/arm/mach-tegra/gpu.c
similarity index 80%
rename from arch/arm/mach-tegra/vpr.c
rename to arch/arm/mach-tegra/gpu.c
index f695811..b2fa50b 100644
--- a/arch/arm/mach-tegra/vpr.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -21,8 +21,11 @@
#include <asm/arch/tegra.h>
#include <asm/arch/mc.h>
-/* Configures VPR. Right now, all we do is turn it off. */
-void config_vpr(void)
+#include <fdt_support.h>
+
+static bool _configured;
+
+void config_gpu(void)
{
struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
@@ -32,4 +35,13 @@ void config_vpr(void)
&mc->mc_video_protect_reg_ctrl);
/* read back to ensure the write went through */
readl(&mc->mc_video_protect_reg_ctrl);
+
+ debug("configured VPR\n");
+
+ _configured = true;
+}
+
+bool vpr_configured(void)
+{
+ return _configured;
}
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index af7698d..39e74f0 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -70,4 +70,7 @@
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
+/* GPU needs setup */
+#define CONFIG_TEGRA_GPU
+
#endif /* _TEGRA124_COMMON_H_ */
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 0348d47..d95056c 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -73,4 +73,7 @@
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
+/* GPU needs setup */
+#define CONFIG_TEGRA_GPU
+
#endif /* _TEGRA210_COMMON_H_ */
--
2.1.4
>From 59676ad5a44e83eecf4a2ed5d5b9b87e22e2d7de Mon Sep 17 00:00:00 2001
From: Alexandre Courbot <acour...@nvidia.com>
Date: Thu, 9 Jul 2015 16:33:01 +0900
Subject: [PATCH 2/2] ARM: tegra: enable GPU DT node when appropriate
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
T124/210 requires some specific configuration (VPR setup) to
be performed by the bootloader before the GPU can be used.
For this reason, the GPU node in the device tree is disabled
by default. This patch enables the node if U-boot has performed
VPR configuration.
Boards enabled by this patch are T124's Jetson TK1 and Venice2
and T210's P2571.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
Cc: Stephen Warren <swar...@nvidia.com>
Cc: Tom Warren <twar...@nvidia.com>
Signed-off-by: Tom Warren <twar...@nvidia.com>
(cherry picked from commit caa6770fca0ed491a6c9e7f3993c02a627b898e2)
Signed-off-by: Andreas Färber <afaer...@suse.de>
---
arch/arm/include/asm/arch-tegra/gpu.h | 15 +++++++++++++++
arch/arm/mach-tegra/gpu.c | 19 +++++++++++++++++++
board/nvidia/jetson-tk1/jetson-tk1.c | 8 ++++++++
board/nvidia/p2571/p2571.c | 7 +++++++
board/nvidia/venice2/venice2.c | 8 ++++++++
include/configs/jetson-tk1.h | 2 ++
include/configs/p2571.h | 1 +
include/configs/venice2.h | 2 ++
8 files changed, 62 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra/gpu.h b/arch/arm/include/asm/arch-tegra/gpu.h
index b347a21..52280f4 100644
--- a/arch/arm/include/asm/arch-tegra/gpu.h
+++ b/arch/arm/include/asm/arch-tegra/gpu.h
@@ -25,3 +25,18 @@ static inline bool gpu_configured(void)
}
#endif /* CONFIG_TEGRA_GPU */
+
+#if defined(CONFIG_OF_LIBFDT)
+
+int gpu_enable_node(void *blob, const char *gpupath);
+
+#else /* CONFIG_OF_LIBFDT */
+
+static inline int gpu_enable_node(void *blob, const char *gpupath)
+{
+ return 0;
+}
+
+#endif /* CONFIG_OF_LIBFDT */
+
+#endif /* __ASM_ARCH_TEGRA_GPU_H */
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index b2fa50b..4ea046d 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -45,3 +45,22 @@ bool vpr_configured(void)
{
return _configured;
}
+
+#if defined(CONFIG_OF_LIBFDT)
+
+int gpu_enable_node(void *blob, const char *gpupath)
+{
+ int offset;
+
+ if (vpr_configured()) {
+ offset = fdt_path_offset(blob, gpupath);
+ if (offset > 0) {
+ fdt_status_okay(blob, offset);
+ debug("enabled GPU node %s\n", gpupath);
+ }
+ }
+
+ return 0;
+}
+
+#endif
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
index 52425a8..3c21767 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -11,6 +11,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
+#include <asm/arch-tegra/gpu.h>
#include "pinmux-config-jetson-tk1.h"
@@ -79,3 +80,10 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
#endif /* PCI */
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+ gpu_enable_node(blob, "/gpu@0,57000000");
+
+ return 0;
+}
diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c
index fc710c1..6ec9159 100644
--- a/board/nvidia/p2571/p2571.c
+++ b/board/nvidia/p2571/p2571.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
+#include <asm/arch-tegra/gpu.h>
#include "pinmux-config-p2571.h"
/*
@@ -27,3 +28,9 @@ void pinmux_init(void)
pinmux_config_drvgrp_table(p2571_drvgrps,
ARRAY_SIZE(p2571_drvgrps));
}
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+ gpu_enable_node(blob, "/gpu@0,57000000");
+ return 0;
+}
diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c
index c56ef12..3e2b9a7 100644
--- a/board/nvidia/venice2/venice2.c
+++ b/board/nvidia/venice2/venice2.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
+#include <asm/arch-tegra/gpu.h>
#include "pinmux-config-venice2.h"
/*
@@ -27,3 +28,10 @@ void pinmux_init(void)
pinmux_config_drvgrp_table(venice2_drvgrps,
ARRAY_SIZE(venice2_drvgrps));
}
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+ gpu_enable_node(blob, "/gpu@0,57000000");
+
+ return 0;
+}
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index 3bbff28..b3e6496 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -82,4 +82,6 @@
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
+#define CONFIG_OF_BOARD_SETUP
+
#endif /* __CONFIG_H */
diff --git a/include/configs/p2571.h b/include/configs/p2571.h
index 77faf5f..1bf4d98 100644
--- a/include/configs/p2571.h
+++ b/include/configs/p2571.h
@@ -71,5 +71,6 @@
#include "tegra-common-post.h"
#define COUNTER_FREQUENCY 38400000
+#define CONFIG_OF_BOARD_SETUP
#endif /* _P2571_H */
diff --git a/include/configs/venice2.h b/include/configs/venice2.h
index 1d9d053..bc5080a 100644
--- a/include/configs/venice2.h
+++ b/include/configs/venice2.h
@@ -64,4 +64,6 @@
#include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h"
+#define CONFIG_OF_BOARD_SETUP
+
#endif /* __CONFIG_H */
--
2.1.4
