Hello community,
here is the log from the commit of package crystalhd for openSUSE:Factory
checked in at Tue Mar 22 18:01:59 CET 2011.
--------
--- crystalhd/crystalhd.changes 2010-12-14 17:37:14.000000000 +0100
+++ /mounts/work_src_done/STABLE/crystalhd/crystalhd.changes 2011-03-16
10:59:31.000000000 +0100
@@ -1,0 +2,5 @@
+Wed Mar 16 09:57:06 UTC 2011 - ism...@namtrac.org
+
+- Fixed unused variable warnings to fix compilation with gcc 4.6
+
+-------------------------------------------------------------------
calling whatdependson for head-i586
New:
----
unused-variable.patch
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ crystalhd.spec ++++++
--- /var/tmp/diff_new_pack.NFH27Y/_old 2011-03-22 18:01:43.000000000 +0100
+++ /var/tmp/diff_new_pack.NFH27Y/_new 2011-03-22 18:01:43.000000000 +0100
@@ -1,7 +1,7 @@
#
-# spec file for package crystalhd (Version 3.10.0)
+# spec file for package crystalhd
#
-# Copyright (c) 2010 SUSE LINUX Products GmbH, Nuernberg, Germany.
+# Copyright (c) 2011 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
@@ -23,13 +23,15 @@
Summary: Broadcom Crystal HD driver KMP
Group: System/Kernel
Version: 3.10.0
-Release: 1
+Release: 5
License: GPLv2
Group: System/Kernel
Source0: crystalhd-driver_%{version}-1.tar.bz2
Source1: README
Source2: LICENSE
Source3: preamble
+# PATCH-FIX-OPENSUSE unused-variable.patch -- Remove unused variables to fix
compilation with gcc 4.6
+Patch: unused-variable.patch
Requires: crystalhd-firmware
Recommends: gstreamer-0_10-plugin-crystalhd
Url: http://www.broadcom.com/support/crystal_hd/
@@ -53,6 +55,7 @@
%prep
%setup -q -n crystalhd-driver
+%patch
echo 'crystalhd.ko external' > Module.supported
set -- *
mkdir source
++++++ unused-variable.patch ++++++
--- crystalhd_hw.c 2010-12-07 18:18:41.000000000 +0100
+++ crystalhd_hw.c 2011-03-16 10:45:04.498009062 +0100
@@ -716,7 +716,7 @@
{
struct device *dev;
struct tx_dma_pkt *tx_dma_packet = NULL;
- uint32_t low_addr, high_addr;
+ //uint32_t low_addr, high_addr;
addr_64 desc_addr;
BC_STATUS sts, add_sts;
uint32_t dummy_index = 0;
@@ -772,8 +772,8 @@
}
desc_addr.full_addr = tx_dma_packet->desc_mem.phy_addr;
- low_addr = desc_addr.low_part;
- high_addr = desc_addr.high_part;
+ //low_addr = desc_addr.low_part;
+ //high_addr = desc_addr.high_part;
tx_dma_packet->call_back = call_back;
tx_dma_packet->cb_event = cb_event;
--- crystalhd_fleafuncs.c 2010-12-07 18:18:41.000000000 +0100
+++ crystalhd_fleafuncs.c 2011-03-16 10:51:22.826009081 +0100
@@ -168,7 +168,7 @@
{
int32_t ddr2_speed_grade[2];
uint32_t sd_0_col_size, sd_0_bank_size, sd_0_row_size;
- uint32_t sd_1_col_size, sd_1_bank_size, sd_1_row_size;
+ //uint32_t sd_1_col_size, sd_1_bank_size, sd_1_row_size;
uint32_t ddr3_mode[2];
uint32_t regVal;
bool bDDR3Detected=false; /*Should be filled in using the detection
logic. Default to DDR2 */
@@ -182,9 +182,9 @@
sd_0_bank_size = BANK_SIZE_8;
sd_0_row_size = ROW_SIZE_8K; /* DDR2 */
/* sd_0_row_size = ROW_SIZE_16K; // DDR3 */
- sd_1_col_size = COL_BITS_10;
- sd_1_bank_size = BANK_SIZE_8;
- sd_1_row_size = ROW_SIZE_8K;
+ //sd_1_col_size = COL_BITS_10;
+ //sd_1_bank_size = BANK_SIZE_8;
+ //sd_1_row_size = ROW_SIZE_8K;
ddr3_mode[0] = 0;
ddr3_mode[1] = 0;
@@ -193,7 +193,7 @@
{
ddr3_mode[0] = 1;
sd_0_row_size = ROW_SIZE_16K; /* DDR3 */
- sd_1_row_size = ROW_SIZE_16K; /* DDR3 */
+ //sd_1_row_size = ROW_SIZE_16K; /* DDR3 */
}
@@ -844,7 +844,7 @@
bool StChangeSuccess=false;
uint32_t tempFLL = 0;
uint32_t freeListLen = 0;
- BC_STATUS sts;
+ //BC_STATUS sts;
struct crystalhd_rx_dma_pkt *rx_pkt = NULL;
freeListLen = crystalhd_dioq_count(hw->rx_freeq);
@@ -868,7 +868,7 @@
{
rx_pkt =
crystalhd_dioq_fetch(hw->rx_freeq);
if (rx_pkt)
- sts = hw->pfnPostRxSideBuff(hw,
rx_pkt);
+ hw->pfnPostRxSideBuff(hw,
rx_pkt);
}
/*printk(" Success\n"); */
@@ -892,7 +892,7 @@
{
rx_pkt =
crystalhd_dioq_fetch(hw->rx_freeq);
if (rx_pkt)
- sts = hw->pfnPostRxSideBuff(hw,
rx_pkt);
+ hw->pfnPostRxSideBuff(hw,
rx_pkt);
}
if (hw->PwrDwnTxIntr)
{
--- crystalhd_flea_ddr.c 2010-12-07 18:18:41.000000000 +0100
+++ crystalhd_flea_ddr.c 2011-03-16 10:56:14.138009092 +0100
@@ -317,11 +317,11 @@
uint8_t DIS_ODT = 0;
uint8_t EN_2T_TIMING = 0;
uint8_t CWL = 0;
- uint8_t DQ_WIDTH = 0;
+ //uint8_t DQ_WIDTH = 0;
- uint8_t DM_IDLE_MODE = 0;
- uint8_t CTL_IDLE_MODE = 0;
- uint8_t DQ_IDLE_MODE = 0;
+ //uint8_t DM_IDLE_MODE = 0;
+ //uint8_t CTL_IDLE_MODE = 0;
+ //uint8_t DQ_IDLE_MODE = 0;
uint8_t DIS_LATENCY_CTRL = 0;
@@ -452,9 +452,9 @@
DIS_ODT = 0;
/*Power Saving Controls */
- DM_IDLE_MODE = 0;
- CTL_IDLE_MODE = 0;
- DQ_IDLE_MODE = 0;
+ //DM_IDLE_MODE = 0;
+ //CTL_IDLE_MODE = 0;
+ //DQ_IDLE_MODE = 0;
/*Latency Control Setting */
DIS_LATENCY_CTRL = 0;
@@ -462,7 +462,7 @@
/* ****** Start of Grain/Flea specific fixed settings ***** */
CS0_ONLY = 1 ; /* 16-bit mode only */
INTLV_DISABLE = 1 ; /* Interleave is always disabled */
- DQ_WIDTH = 16 ;
+ //DQ_WIDTH = 16 ;
/* ****** End of Grain specific fixed settings ***** */
#if 0
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Remember to have fun...
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