Hello community,

here is the log from the commit of package opus for openSUSE:Factory checked in 
at 2019-08-19 20:46:58
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/opus (Old)
 and      /work/SRC/openSUSE:Factory/.opus.new.22127 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "opus"

Mon Aug 19 20:46:58 2019 rev:21 rq:723905 version:1.3.1

Changes:
--------
--- /work/SRC/openSUSE:Factory/opus/opus.changes        2019-05-27 
08:37:45.679085571 +0200
+++ /work/SRC/openSUSE:Factory/.opus.new.22127/opus.changes     2019-08-19 
20:47:00.277103408 +0200
@@ -1,0 +2,16 @@
+Thu Aug 15 17:37:36 UTC 2019 - Bjørn Lie <bjorn....@gmail.com>
+
+- Add 2 upstream bug fixes for Silk:
+  * opus-Silk-CNG-adapts-faster.patch: Silk CNG adapts faster to
+    received packets with lower gains.
+  * opus-Silk-fix-arm-optimization.patch: Avoid processing LPC
+    coeffs beyond the given order in NEON optimizations.
+
+-------------------------------------------------------------------
+Thu Aug  8 11:02:43 UTC 2019 - Dominique Leuenberger <dims...@opensuse.org>
+
+- Own %{_datadir}/aclocal: when we might switch to pkgconf instead
+  of pkg-config, nothing in the build root is 'accidentally' owning
+  this directory for us.
+
+-------------------------------------------------------------------

New:
----
  opus-Silk-CNG-adapts-faster.patch
  opus-Silk-fix-arm-optimization.patch

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ opus.spec ++++++
--- /var/tmp/diff_new_pack.PZrrMQ/_old  2019-08-19 20:47:00.861103283 +0200
+++ /var/tmp/diff_new_pack.PZrrMQ/_new  2019-08-19 20:47:00.861103283 +0200
@@ -27,6 +27,10 @@
 URL:            https://opus-codec.org/
 Source:         https://archive.mozilla.org/pub/opus/%{name}-%{version}.tar.gz
 Source99:       baselibs.conf
+# PATCH-FIX-UPSTREAM opus-Silk-CNG-adapts-faster.patch -- Silk CNG adapts 
faster to received packets with lower gains
+Patch0:         opus-Silk-CNG-adapts-faster.patch
+# PATCH-FIX-UPSTREAM opus-Silk-fix-arm-optimization.patch -- Avoid processing 
LPC coeffs beyond the given order in NEON optimizations
+Patch1:         opus-Silk-fix-arm-optimization.patch
 BuildRequires:  pkgconfig
 
 %description
@@ -55,6 +59,8 @@
 
 %prep
 %setup -q
+%patch0 -p1
+%patch1 -p1
 
 %build
 %configure \
@@ -83,6 +89,7 @@
 %{_libdir}/libopus.so
 %{_includedir}/opus
 %{_libdir}/pkgconfig/opus.pc
+%dir %{_datadir}/aclocal
 %{_datadir}/aclocal/opus.m4
 
 %changelog

++++++ opus-Silk-CNG-adapts-faster.patch ++++++
>From 3ebf4ad86de2469572f7fa2bd6451469e7867c8f Mon Sep 17 00:00:00 2001
From: Felicia Lim <f...@google.com>
Date: Fri, 31 May 2019 13:58:44 -0700
Subject: [PATCH] Silk CNG adapts faster to received packets with lower gains

---
 silk/CNG.c    | 4 ++++
 silk/define.h | 1 +
 2 files changed, 5 insertions(+)

diff --git a/silk/CNG.c b/silk/CNG.c
index ef8e38df..2a910099 100644
--- a/silk/CNG.c
+++ b/silk/CNG.c
@@ -118,6 +118,10 @@ void silk_CNG(
         /* Smooth gains */
         for( i = 0; i < psDec->nb_subfr; i++ ) {
             psCNG->CNG_smth_Gain_Q16 += silk_SMULWB( psDecCtrl->Gains_Q16[ i ] 
- psCNG->CNG_smth_Gain_Q16, CNG_GAIN_SMTH_Q16 );
+            /* If the smoothed gain is 3 dB greater than this subframe's gain, 
use this subframe's gain to adapt faster. */
+            if( silk_SMULWW( psCNG->CNG_smth_Gain_Q16, 
CNG_GAIN_SMTH_THRESHOLD_Q16 ) > psDecCtrl->Gains_Q16[ i ] ) {
+                psCNG->CNG_smth_Gain_Q16 = psDecCtrl->Gains_Q16[ i ];
+            }
         }
     }
 
diff --git a/silk/define.h b/silk/define.h
index 247cb0bf..491c86f3 100644
--- a/silk/define.h
+++ b/silk/define.h
@@ -225,6 +225,7 @@ extern "C"
 /* Defines for CN generation */
 #define CNG_BUF_MASK_MAX                        255     /* 
2^floor(log2(MAX_FRAME_LENGTH))-1    */
 #define CNG_GAIN_SMTH_Q16                       4634    /* 0.25^(1/4)          
                 */
+#define CNG_GAIN_SMTH_THRESHOLD_Q16             46396   /* -3 dB               
                 */
 #define CNG_NLSF_SMTH_Q16                       16348   /* 0.25                
                 */
 
 #ifdef __cplusplus
-- 
2.11.0

++++++ opus-Silk-fix-arm-optimization.patch ++++++
>From 812ae3fb5c589aaafe761b8ebf86bcbbb8f0ed76 Mon Sep 17 00:00:00 2001
From: Felicia Lim <f...@google.com>
Date: Mon, 8 Jul 2019 09:44:35 -0700
Subject: [PATCH] Avoid processing LPC coeffs beyond the given order in NEON
 optimizations

---
 silk/arm/LPC_inv_pred_gain_neon_intr.c | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/silk/arm/LPC_inv_pred_gain_neon_intr.c 
b/silk/arm/LPC_inv_pred_gain_neon_intr.c
index ab426bcd..726e6667 100644
--- a/silk/arm/LPC_inv_pred_gain_neon_intr.c
+++ b/silk/arm/LPC_inv_pred_gain_neon_intr.c
@@ -210,19 +210,23 @@ opus_int32 silk_LPC_inverse_pred_gain_neon(         /* O  
 Returns inverse predi
         /* Increase Q domain of the AR coefficients */
         t0_s16x8 = vld1q_s16( A_Q12 +  0 );
         t1_s16x8 = vld1q_s16( A_Q12 +  8 );
-        t2_s16x8 = vld1q_s16( A_Q12 + 16 );
+        if ( order > 16 ) {
+          t2_s16x8 = vld1q_s16( A_Q12 + 16 );
+        }
         t0_s32x4 = vpaddlq_s16( t0_s16x8 );
 
         switch( order - leftover )
         {
         case 24:
             t0_s32x4 = vpadalq_s16( t0_s32x4, t2_s16x8 );
+            vst1q_s32( Atmp_QA + 16, vshll_n_s16( vget_low_s16 ( t2_s16x8 ), 
QA - 12 ) );
+            vst1q_s32( Atmp_QA + 20, vshll_n_s16( vget_high_s16( t2_s16x8 ), 
QA - 12 ) );
             /* FALLTHROUGH */
 
         case 16:
             t0_s32x4 = vpadalq_s16( t0_s32x4, t1_s16x8 );
-            vst1q_s32( Atmp_QA + 16, vshll_n_s16( vget_low_s16 ( t2_s16x8 ), 
QA - 12 ) );
-            vst1q_s32( Atmp_QA + 20, vshll_n_s16( vget_high_s16( t2_s16x8 ), 
QA - 12 ) );
+            vst1q_s32( Atmp_QA +  8, vshll_n_s16( vget_low_s16 ( t1_s16x8 ), 
QA - 12 ) );
+            vst1q_s32( Atmp_QA + 12, vshll_n_s16( vget_high_s16( t1_s16x8 ), 
QA - 12 ) );
             /* FALLTHROUGH */
 
         case 8:
@@ -230,8 +234,8 @@ opus_int32 silk_LPC_inverse_pred_gain_neon(         /* O   
Returns inverse predi
             const int32x2_t t_s32x2 = vpadd_s32( vget_low_s32( t0_s32x4 ), 
vget_high_s32( t0_s32x4 ) );
             const int64x1_t t_s64x1 = vpaddl_s32( t_s32x2 );
             DC_resp = vget_lane_s32( vreinterpret_s32_s64( t_s64x1 ), 0 );
-            vst1q_s32( Atmp_QA +  8, vshll_n_s16( vget_low_s16 ( t1_s16x8 ), 
QA - 12 ) );
-            vst1q_s32( Atmp_QA + 12, vshll_n_s16( vget_high_s16( t1_s16x8 ), 
QA - 12 ) );
+            vst1q_s32( Atmp_QA + 0, vshll_n_s16( vget_low_s16 ( t0_s16x8 ), QA 
- 12 ) );
+            vst1q_s32( Atmp_QA + 4, vshll_n_s16( vget_high_s16( t0_s16x8 ), QA 
- 12 ) );
         }
         break;
 
@@ -246,16 +250,22 @@ opus_int32 silk_LPC_inverse_pred_gain_neon(         /* O  
 Returns inverse predi
         case 6:
             DC_resp += (opus_int32)A_Q12[ 5 ];
             DC_resp += (opus_int32)A_Q12[ 4 ];
+            Atmp_QA[ order - leftover + 5 ] = silk_LSHIFT32( 
(opus_int32)A_Q12[ 5 ], QA - 12 );
+            Atmp_QA[ order - leftover + 4 ] = silk_LSHIFT32( 
(opus_int32)A_Q12[ 4 ], QA - 12 );
             /* FALLTHROUGH */
 
         case 4:
             DC_resp += (opus_int32)A_Q12[ 3 ];
             DC_resp += (opus_int32)A_Q12[ 2 ];
+            Atmp_QA[ order - leftover + 3 ] = silk_LSHIFT32( 
(opus_int32)A_Q12[ 3 ], QA - 12 );
+            Atmp_QA[ order - leftover + 2 ] = silk_LSHIFT32( 
(opus_int32)A_Q12[ 2 ], QA - 12 );
             /* FALLTHROUGH */
 
         case 2:
             DC_resp += (opus_int32)A_Q12[ 1 ];
             DC_resp += (opus_int32)A_Q12[ 0 ];
+            Atmp_QA[ order - leftover + 1 ] = silk_LSHIFT32( 
(opus_int32)A_Q12[ 1 ], QA - 12 );
+            Atmp_QA[ order - leftover + 0 ] = silk_LSHIFT32( 
(opus_int32)A_Q12[ 0 ], QA - 12 );
             /* FALLTHROUGH */
 
         default:
@@ -266,8 +276,6 @@ opus_int32 silk_LPC_inverse_pred_gain_neon(         /* O   
Returns inverse predi
         if( DC_resp >= 4096 ) {
             invGain_Q30 = 0;
         } else {
-            vst1q_s32( Atmp_QA + 0, vshll_n_s16( vget_low_s16 ( t0_s16x8 ), QA 
- 12 ) );
-            vst1q_s32( Atmp_QA + 4, vshll_n_s16( vget_high_s16( t0_s16x8 ), QA 
- 12 ) );
             invGain_Q30 = LPC_inverse_pred_gain_QA_neon( Atmp_QA, order );
         }
     }
-- 
2.11.0


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