Hello community,
here is the log from the commit of package cpupower for openSUSE:Factory
checked in at 2014-08-25 11:03:16
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/cpupower (Old)
and /work/SRC/openSUSE:Factory/.cpupower.new (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "cpupower"
Changes:
--------
--- /work/SRC/openSUSE:Factory/cpupower/cpupower.changes 2014-04-09
13:11:41.000000000 +0200
+++ /work/SRC/openSUSE:Factory/.cpupower.new/cpupower.changes 2014-08-25
11:03:43.000000000 +0200
@@ -1,0 +2,12 @@
+Wed Aug 13 13:06:27 UTC 2014 - tr...@suse.de
+
+- Fix cpupower_export_tarball_from_git.sh script and make sure msr-index.h
+ is included in the turbostat tarball.
+
+-------------------------------------------------------------------
+Tue Aug 12 13:49:16 UTC 2014 - tr...@suse.de
+
+- Update turbostat to latest 3.17 kernel version (in fact it is 3.16-rc7)
+ This fixes bnc#891523
+
+-------------------------------------------------------------------
Old:
----
cpupower-3.14.tar.bz2
turbostat-3.14.tar.bz2
New:
----
turbostat-3.17.tar.bz2
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ cpupower.spec ++++++
--- /var/tmp/diff_new_pack.L0Eu7t/_old 2014-08-25 11:03:45.000000000 +0200
+++ /var/tmp/diff_new_pack.L0Eu7t/_new 2014-08-25 11:03:45.000000000 +0200
@@ -24,7 +24,7 @@
%define version %(rpm -q --qf '%{VERSION}' kernel-source)
Version: 3.13
Release: 0
-%define tsversion 3.14
+%define tsversion 3.17
Summary: Tools to determine and set CPU Power related Settings
License: GPL-2.0
Group: System/Base
++++++ cpupower_export_tarball_from_git.sh ++++++
--- /var/tmp/diff_new_pack.L0Eu7t/_old 2014-08-25 11:03:45.000000000 +0200
+++ /var/tmp/diff_new_pack.L0Eu7t/_new 2014-08-25 11:03:45.000000000 +0200
@@ -60,7 +60,8 @@
git archive --format=tar $GIT_TAG tools/power/x86/turbostat |tar -x
mv tools/power/x86/turbostat turbostat${VERSION}
mkdir turbostat${VERSION}/asm
-cp "${GIT_DIR}"/../../../../../arch/x86/include/uapi/asm/msr-index.h
turbostat${VERSION}/asm
+[ ! -e "$GIT_DIR"/../arch/x86/include/uapi/asm/msr-index.h ] && echo
"msr-index.h does not exist" && exit 1
+cp "$GIT_DIR"/../arch/x86/include/uapi/asm/msr-index.h turbostat${VERSION}/asm
tar -cvjf turbostat${VERSION}.tar.bz2 turbostat${VERSION}
popd
mv "$DIR/cpupower${VERSION}".tar.bz2 .
++++++ turbostat-3.14.tar.bz2 -> turbostat-3.17.tar.bz2 ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/turbostat-3.14/asm/msr-index.h
new/turbostat-3.17/asm/msr-index.h
--- old/turbostat-3.14/asm/msr-index.h 2014-03-28 19:57:08.000000000 +0100
+++ new/turbostat-3.17/asm/msr-index.h 2014-08-13 15:05:04.000000000 +0200
@@ -297,6 +297,8 @@
#define MSR_IA32_TSC_ADJUST 0x0000003b
#define MSR_IA32_BNDCFGS 0x00000d90
+#define MSR_IA32_XSS 0x00000da0
+
#define FEATURE_CONTROL_LOCKED (1<<0)
#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1)
#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
@@ -384,7 +386,7 @@
#define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18
#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL <<
MSR_IA32_MISC_ENABLE_MWAIT_BIT)
#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22
-#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL <<
MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT);
+#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL <<
MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT)
#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23
#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL <<
MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT)
#define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34
@@ -558,6 +560,7 @@
/* VMX_BASIC bits and bitmasks */
#define VMX_BASIC_VMCS_SIZE_SHIFT 32
+#define VMX_BASIC_TRUE_CTLS (1ULL << 55)
#define VMX_BASIC_64 0x0001000000000000LLU
#define VMX_BASIC_MEM_TYPE_SHIFT 50
#define VMX_BASIC_MEM_TYPE_MASK 0x003c000000000000LLU
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/turbostat-3.14/turbostat.c
new/turbostat-3.17/turbostat.c
--- old/turbostat-3.14/turbostat.c 2014-03-28 07:50:06.000000000 +0100
+++ new/turbostat-3.17/turbostat.c 2014-08-11 06:31:58.000000000 +0200
@@ -334,9 +334,9 @@
if (do_rapl & RAPL_DRAM)
outp += sprintf(outp, "RAMWatt ");
if (do_rapl & RAPL_PKG_PERF_STATUS)
- outp += sprintf(outp, " PKG_%% ");
+ outp += sprintf(outp, " PKG_%% ");
if (do_rapl & RAPL_DRAM_PERF_STATUS)
- outp += sprintf(outp, " RAM_%% ");
+ outp += sprintf(outp, " RAM_%% ");
} else {
if (do_rapl & RAPL_PKG)
outp += sprintf(outp, " Pkg_J ");
@@ -436,8 +436,6 @@
if (t == &average.threads) {
if (show_pkg)
outp += sprintf(outp, " -");
- if (show_pkg && show_core)
- outp += sprintf(outp, " -");
if (show_core)
outp += sprintf(outp, " -");
if (show_cpu)
@@ -449,8 +447,6 @@
else
outp += sprintf(outp, " -");
}
- if (show_pkg && show_core)
- outp += sprintf(outp, " -");
if (show_core) {
if (c)
outp += sprintf(outp, "%8d", c->core_id);
@@ -1496,6 +1492,9 @@
case 0x46: /* HSW */
case 0x37: /* BYT */
case 0x4D: /* AVN */
+ case 0x3D: /* BDW */
+ case 0x4F: /* BDX */
+ case 0x56: /* BDX-DE */
return 1;
case 0x2E: /* Nehalem-EX Xeon - Beckton */
case 0x2F: /* Westmere-EX Xeon - Eagleton */
@@ -1609,9 +1608,12 @@
case 0x3C: /* HSW */
case 0x45: /* HSW */
case 0x46: /* HSW */
+ case 0x3D: /* BDW */
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX |
RAPL_PKG_POWER_INFO;
break;
case 0x3F: /* HSX */
+ case 0x4F: /* BDX */
+ case 0x56: /* BDX-DE */
do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS |
RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
break;
case 0x2D:
@@ -1855,6 +1857,9 @@
case 0x3F: /* HSW */
case 0x45: /* HSW */
case 0x46: /* HSW */
+ case 0x3D: /* BDW */
+ case 0x4F: /* BDX */
+ case 0x56: /* BDX-DE */
return 1;
}
return 0;
@@ -1866,7 +1871,8 @@
return 0;
switch (model) {
- case 0x45:
+ case 0x45: /* HSW */
+ case 0x3D: /* BDW */
return 1;
}
return 0;
@@ -1965,13 +1971,13 @@
if (get_msr(0, MSR_IA32_TEMPERATURE_TARGET, &msr))
goto guess;
- target_c_local = (msr >> 16) & 0x7F;
+ target_c_local = (msr >> 16) & 0xFF;
if (verbose)
fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx
(%d C)\n",
cpu, msr, target_c_local);
- if (target_c_local < 85 || target_c_local > 127)
+ if (!target_c_local)
goto guess;
tcc_activation_temp = target_c_local;
--
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