Hello community,

here is the log from the commit of package rasdaemon for openSUSE:Factory 
checked in at 2016-03-09 15:17:24
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/rasdaemon (Old)
 and      /work/SRC/openSUSE:Factory/.rasdaemon.new (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "rasdaemon"

Changes:
--------
--- /work/SRC/openSUSE:Factory/rasdaemon/rasdaemon.changes      2015-12-03 
13:30:43.000000000 +0100
+++ /work/SRC/openSUSE:Factory/.rasdaemon.new/rasdaemon.changes 2016-03-09 
16:48:47.000000000 +0100
@@ -1,0 +2,10 @@
+Mon Mar  7 15:40:41 UTC 2016 - fv...@suse.com
+
+- Run spec-cleaner: - Change Group and copyright notice
+
+-------------------------------------------------------------------
+Mon Mar  7 10:05:08 UTC 2016 - tr...@suse.de
+
+- Update to version 0.5.7 (including Knights Landing CPU support, fate#319513)
+
+-------------------------------------------------------------------

Old:
----
  rasdaemon-0.5.6.tar.xz

New:
----
  rasdaemon-0.5.7.tar.xz

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ rasdaemon.spec ++++++
--- /var/tmp/diff_new_pack.TXeaQL/_old  2016-03-09 16:48:48.000000000 +0100
+++ /var/tmp/diff_new_pack.TXeaQL/_new  2016-03-09 16:48:48.000000000 +0100
@@ -1,7 +1,7 @@
 #
 # spec file for package rasdaemon
 #
-# Copyright (c) 2015 SUSE LINUX GmbH, Nuernberg, Germany.
+# Copyright (c) 2016 SUSE LINUX GmbH, Nuernberg, Germany.
 #
 # All modifications and additions to the file contributed by third parties
 # remain the property of their copyright owners, unless otherwise agreed
@@ -17,11 +17,11 @@
 
 
 Name:           rasdaemon
-Version:        0.5.6
+Version:        0.5.7
 Release:        0
 Summary:        Utility to receive RAS error tracings
 License:        GPL-2.0
-Group:          Development/Hardware
+Group:          Hardware/Other
 Url:            https://git.fedorahosted.org/cgit/rasdaemon.git
 Source:         
https://git.fedorahosted.org/cgit/rasdaemon.git/snapshot/%{name}-%{version}.tar.xz
 BuildRequires:  autoconf
@@ -58,7 +58,7 @@
 make %{?_smp_mflags}
 
 %install
-make DESTDIR=%{buildroot} install %{?_smp_mflags}
+make %{?_smp_mflags} DESTDIR=%{buildroot} install
 install -D -p -m 0644 misc/rasdaemon.service 
%{buildroot}%{_unitdir}/rasdaemon.service
 ln -s %{_sbindir}/service %{buildroot}/%{_sbindir}/rcrasdaemon
 install -D -p -m 0644 misc/ras-mc-ctl.service 
%{buildroot}%{_unitdir}/ras-mc-ctl.service

++++++ rasdaemon-0.5.6.tar.xz -> rasdaemon-0.5.7.tar.xz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/ChangeLog 
new/rasdaemon-0.5.7/ChangeLog
--- old/rasdaemon-0.5.6/ChangeLog       2015-07-03 12:38:05.000000000 +0200
+++ new/rasdaemon-0.5.7/ChangeLog       2016-02-05 18:24:42.000000000 +0100
@@ -87,3 +87,8 @@
        * Remove a space from mcgstatus_msg
        * Add support to log Local Machine Check Exception (LMCE)
 
+2016-02-05     Mauro Carvalho Chehab <mche...@osg.samsung.com>
+       - Version 0.5.7
+       * Add model numbers for Broadwell-EP/EX and -DE
+       * Add support for Knights Landing processor
+
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/Makefile.am 
new/rasdaemon-0.5.7/Makefile.am
--- old/rasdaemon-0.5.6/Makefile.am     2015-07-03 12:38:05.000000000 +0200
+++ new/rasdaemon-0.5.7/Makefile.am     2016-02-05 18:24:42.000000000 +0100
@@ -28,7 +28,8 @@
    rasdaemon_SOURCES += ras-mce-handler.c mce-intel.c mce-amd-k8.c \
                        mce-intel-p4-p6.c mce-intel-nehalem.c \
                        mce-intel-dunnington.c mce-intel-tulsa.c \
-                       mce-intel-sb.c mce-intel-ivb.c mce-intel-haswell.c
+                       mce-intel-sb.c mce-intel-ivb.c mce-intel-haswell.c \
+                       mce-intel-knl.c
 endif
 if WITH_EXTLOG
    rasdaemon_SOURCES += ras-extlog-handler.c
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/configure.ac 
new/rasdaemon-0.5.7/configure.ac
--- old/rasdaemon-0.5.6/configure.ac    2015-07-03 12:38:05.000000000 +0200
+++ new/rasdaemon-0.5.7/configure.ac    2016-02-05 18:24:42.000000000 +0100
@@ -1,4 +1,4 @@
-AC_INIT([RASdaemon], 0.5.6)
+AC_INIT([RASdaemon], 0.5.7)
 AM_SILENT_RULES([yes])
 AC_CANONICAL_SYSTEM
 AC_CONFIG_MACRO_DIR([m4])
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/man/ras-mc-ctl.8.in 
new/rasdaemon-0.5.7/man/ras-mc-ctl.8.in
--- old/rasdaemon-0.5.6/man/ras-mc-ctl.8.in     2015-07-03 12:38:05.000000000 
+0200
+++ new/rasdaemon-0.5.7/man/ras-mc-ctl.8.in     2016-02-05 18:24:42.000000000 
+0100
@@ -69,14 +69,14 @@
 well as the current labels registered with EDAC.
 .TP
 .BI "--guess-labels"
-Print DMI labels, when bank locator is available at the DMI table.
+Print DMI labels, when bank locator is available in the DMI table.
 It helps to fill the labels database at @sysconfdir@/ras/dimm_labels.d/.
 .TP
 .BI "--labeldb="DB
 Specify an alternate location for the labels database.
 .TP
 .BI "--delay="time
-Specify a delay of \ftime\fR seconds before registering dimm labels.
+Specify a delay of \fBtime\fR seconds before registering DIMM labels.
 Only meaninful if used together with --register-labels.
 .TP
 .BI "--layout
@@ -121,4 +121,4 @@
 utility will most often require that \fBras-mc-ctl\fR be run as root.
 
 .SH SEE ALSO
-\f\fBrasdaemon\fR(1)
+\fBrasdaemon\fR(1)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/mce-intel-knl.c 
new/rasdaemon-0.5.7/mce-intel-knl.c
--- old/rasdaemon-0.5.6/mce-intel-knl.c 1970-01-01 01:00:00.000000000 +0100
+++ new/rasdaemon-0.5.7/mce-intel-knl.c 2016-02-05 18:24:42.000000000 +0100
@@ -0,0 +1,139 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+*/
+
+#include <string.h>
+#include <stdio.h>
+
+#include "ras-mce-handler.h"
+#include "bitfield.h"
+
+static struct field memctrl_mc7[] = {
+       SBITFIELD(16, "CA Parity error"),
+       SBITFIELD(17, "Internal Parity error except WDB"),
+       SBITFIELD(18, "Internal Parity error from WDB"),
+       SBITFIELD(19, "Correctable Patrol Scrub"),
+       SBITFIELD(20, "Uncorrectable Patrol Scrub"),
+       SBITFIELD(21, "Spare Correctable Error"),
+       SBITFIELD(22, "Spare UC Error"),
+       SBITFIELD(23, "CORR Chip fail even MC only, 4 bit burst error EDC 
only"),
+       {}
+};
+
+void knl_decode_model(struct ras_events *ras, struct mce_event *e)
+{
+       uint64_t status = e->status;
+       uint32_t mca = status & 0xffff;
+       unsigned rank0 = -1, rank1 = -1, chan = 0;
+
+       switch (e->bank) {
+       case 5:
+               switch (EXTRACT(status, 0, 15)) {
+               case 0x402:
+                       mce_snprintf(e->mcastatus_msg, "PCU Internal Errors");
+                       break;
+               case 0x403:
+                       mce_snprintf(e->mcastatus_msg, "VCU Internal Errors");
+                       break;
+               case 0x407:
+                       mce_snprintf(e->mcastatus_msg,
+                                    "Other UBOX Internal Errors");
+                       break;
+               }
+               break;
+       case 7:
+       case 8:
+       case 9:
+       case 10:
+       case 11:
+       case 12:
+       case 13:
+       case 14:
+       case 15:
+       case 16:
+               if ((EXTRACT(status, 0, 15)) == 0x5) {
+                       mce_snprintf(e->mcastatus_msg, "Internal Parity error");
+               } else {
+                       chan = (EXTRACT(status, 0, 3)) + 3 * (e->bank == 15);
+                       switch (EXTRACT(status, 4, 7)) {
+                       case 0x0:
+                               mce_snprintf(e->mcastatus_msg,
+                                            "Undefined request on channel %d",
+                                            chan);
+                               break;
+                       case 0x1:
+                               mce_snprintf(e->mcastatus_msg,
+                                            "Read on channel %d", chan);
+                               break;
+                       case 0x2:
+                               mce_snprintf(e->mcastatus_msg,
+                                            "Write on channel %d", chan);
+                               break;
+                       case 0x3:
+                               mce_snprintf(e->mcastatus_msg,
+                                            "CA error on channel %d", chan);
+                               break;
+                       case 0x4:
+                               mce_snprintf(e->mcastatus_msg,
+                                            "Scrub error on channel %d", chan);
+                               break;
+                       }
+               }
+               decode_bitfield(e, status, memctrl_mc7);
+               break;
+       default:
+               break;
+       }
+
+       /*
+        * Memory error specific code. Returns if the error is not a MC one
+        */
+
+       /* Check if the error is at the memory controller */
+       if ((mca >> 7) != 1)
+               return;
+
+       /* Ignore unless this is an corrected extended error from an iMC bank */
+       if (e->bank < 7 || e->bank > 16 || (status & MCI_STATUS_UC) ||
+           !test_prefix(7, status & 0xefff))
+               return;
+
+       /*
+        * Parse the reported channel and ranks
+        */
+
+       chan = EXTRACT(status, 0, 3);
+       if (chan == 0xf) {
+               mce_snprintf(e->mc_location, "memory_channel=unspecified");
+       } else {
+               chan = chan + 3 * (e->bank == 15);
+               mce_snprintf(e->mc_location, "memory_channel=%d", chan);
+
+               if (EXTRACT(e->misc, 62, 62))
+                       rank0 = EXTRACT(e->misc, 46, 50);
+               if (EXTRACT(e->misc, 63, 63))
+                       rank1 = EXTRACT(e->misc, 51, 55);
+
+               /*
+                * FIXME: The conversion from rank to dimm requires to parse the
+                * DMI tables and call failrank2dimm().
+                */
+               if (rank0 != -1 && rank1 != -1)
+                       mce_snprintf(e->mc_location, "ranks=%d and %d",
+                                    rank0, rank1);
+               else if (rank0 != -1)
+                       mce_snprintf(e->mc_location, "rank=%d", rank0);
+       }
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/mce-intel.c 
new/rasdaemon-0.5.7/mce-intel.c
--- old/rasdaemon-0.5.6/mce-intel.c     2015-07-03 12:38:05.000000000 +0200
+++ new/rasdaemon-0.5.7/mce-intel.c     2016-02-05 18:24:42.000000000 +0100
@@ -397,6 +397,10 @@
                break;
        case CPU_HASWELL_EPEX:
                hsw_decode_model(ras, e);
+               break;
+       case CPU_KNIGHTS_LANDING:
+               knl_decode_model(ras, e);
+               break;
        default:
                break;
        }
@@ -460,6 +464,7 @@
        case CPU_SANDY_BRIDGE_EP:
        case CPU_IVY_BRIDGE_EPEX:
        case CPU_HASWELL_EPEX:
+       case CPU_KNIGHTS_LANDING:
                msr = 0x17f;    /* MSR_ERROR_CONTROL */
                bit = 0x2;      /* MemError Log Enable */
                break;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/misc/rasdaemon.spec.in 
new/rasdaemon-0.5.7/misc/rasdaemon.spec.in
--- old/rasdaemon-0.5.6/misc/rasdaemon.spec.in  2015-07-03 12:38:05.000000000 
+0200
+++ new/rasdaemon-0.5.7/misc/rasdaemon.spec.in  2016-02-05 18:24:42.000000000 
+0100
@@ -49,6 +49,9 @@
 
 %changelog
 
+* Fri Feb 05 2016 Mauro Carvalho Chehab <mche...@osg.samsung.com> 0.5.7-1
+- Bump to version 0.5.7 adding support for Broadwell-EP/EX and -DE and Knights 
Landing processors
+
 * Fri Jul 03 2015 Mauro Carvalho Chehab <mche...@osg.samsung.com> 0.5.6-1
 - Bump to version 0.5.6 with support for LMCE and some fixes
 
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/ras-mce-handler.c 
new/rasdaemon-0.5.7/ras-mce-handler.c
--- old/rasdaemon-0.5.6/ras-mce-handler.c       2015-07-03 12:38:05.000000000 
+0200
+++ new/rasdaemon-0.5.7/ras-mce-handler.c       2016-02-05 18:24:42.000000000 
+0100
@@ -90,7 +90,8 @@
                        return CPU_HASWELL;
                else if (mce->model == 0x3f)
                        return CPU_HASWELL_EPEX;
-               else if (mce->model == 0x3d)
+               else if (mce->model == 0x3d || mce->model == 0x4f ||
+                        mce->model == 0x56)
                        return CPU_BROADWELL;
                else if (mce->model == 0x57)
                        return CPU_KNIGHTS_LANDING;
@@ -222,6 +223,7 @@
        case CPU_SANDY_BRIDGE_EP:
        case CPU_IVY_BRIDGE_EPEX:
        case CPU_HASWELL_EPEX:
+       case CPU_KNIGHTS_LANDING:
                set_intel_imc_log(mce->cputype, ncpus);
        default:
                break;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/rasdaemon-0.5.6/ras-mce-handler.h 
new/rasdaemon-0.5.7/ras-mce-handler.h
--- old/rasdaemon-0.5.6/ras-mce-handler.h       2015-07-03 12:38:05.000000000 
+0200
+++ new/rasdaemon-0.5.7/ras-mce-handler.h       2016-02-05 18:24:42.000000000 
+0100
@@ -119,6 +119,7 @@
 void snb_decode_model(struct ras_events *ras, struct mce_event *e);
 void ivb_decode_model(struct ras_events *ras, struct mce_event *e);
 void hsw_decode_model(struct ras_events *ras, struct mce_event *e);
+void knl_decode_model(struct ras_events *ras, struct mce_event *e);
 void tulsa_decode_model(struct mce_event *e);
 
 /* Software defined banks */


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