Hi, The attached patch fixup the setup of MII clock for case enet1 is linked to external switch for 6358 soc base boards.
Warning! Despite, this improves stability on NB4 and 96358VW boards, it must be confirmed on other boards. Kind Regards, Miguel
Index: openwrt.org/target/linux/brcm63xx/patches-2.6.32/250-6358-enet1-external-mii-clk.patch =================================================================== --- openwrt.org/target/linux/brcm63xx/patches-2.6.32/250-6358-enet1-external-mii-clk.patch (revision 0) +++ openwrt.org/target/linux/brcm63xx/patches-2.6.32/250-6358-enet1-external-mii-clk.patch (revision 0) @@ -0,0 +1,22 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1308,6 +1308,8 @@ void __init board_prom_init(void) + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G3_EXT_MII | + GPIO_MODE_6348_G0_EXT_MII; ++ else if (BCMCPU_IS_6358()) ++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV; + } + + bcm_gpio_writel(val, GPIO_MODE_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -402,6 +402,8 @@ + #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7) + #define GPIO_MODE_6358_SERIAL_LED (1 << 10) + #define GPIO_MODE_6358_UTOPIA (1 << 12) ++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 30) ++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 31) + + + /************************************************************************* Index: openwrt.org/target/linux/brcm63xx/patches-2.6.33/250-6358-enet1-external-mii-clk.patch =================================================================== --- openwrt.org/target/linux/brcm63xx/patches-2.6.33/250-6358-enet1-external-mii-clk.patch (revision 0) +++ openwrt.org/target/linux/brcm63xx/patches-2.6.33/250-6358-enet1-external-mii-clk.patch (revision 0) @@ -0,0 +1,22 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1308,6 +1308,8 @@ void __init board_prom_init(void) + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G3_EXT_MII | + GPIO_MODE_6348_G0_EXT_MII; ++ else if (BCMCPU_IS_6358()) ++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV; + } + + bcm_gpio_writel(val, GPIO_MODE_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -402,6 +402,8 @@ + #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7) + #define GPIO_MODE_6358_SERIAL_LED (1 << 10) + #define GPIO_MODE_6358_UTOPIA (1 << 12) ++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 30) ++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 31) + + + /*************************************************************************
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