On 11/01/11 12:49, Peter Lebbing wrote: > The ADM6996F and ADM6996L are accessed through an SPI interface, it seems, the > same bus where the serial config EEPROM is located. I'm not 100% sure of the > protocol used to access the switch chip from the CPU, the datasheet isn't very > definitive on this, and I do not have equipment with that chip.
Scratch that. The specification of the management bus comes after the register description in the datasheet, not before :). I just noticed that. It *is* a sort of MDIO, sorry about that. But they send 32 bits of data instead of the regular 16 of MDIO. Anyway, identification of the F and L chips is at PHY address 0, register 0, and is 0x00071010 as I said. But because they send 32 databits instead of 16, I'm not sure what you would actually see if you just search the MDIO bus from your MAC. Still, it's completely different from the chip ID of the ADM6996M. Peter. -- I use the GNU Privacy Guard (GnuPG) in combination with Enigmail. You can send me encrypted mail if you want some privacy. My key is available at http://wwwhome.cs.utwente.nl/~lebbing/pubkey.txt (new, larger key created on Nov 12, 2009) _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
