Signed-off-by: Wojciech Dubowik <wojciech.dubo...@neratec.com>
---
 .../251-ar2315_use_physical_addresses.patch        |   72 ++++++++++++++++++++
 .../251-ar2315_use_physical_addresses.patch        |   72 ++++++++++++++++++++
 .../251-ar2315_use_physical_addresses.patch        |   72 ++++++++++++++++++++
 .../251-ar2315_use_physical_addresses.patch        |   72 ++++++++++++++++++++
 .../251-ar2315_use_physical_addresses.patch        |   72 ++++++++++++++++++++
 5 files changed, 360 insertions(+), 0 deletions(-)
 create mode 100644 
target/linux/atheros/patches-2.6.32/251-ar2315_use_physical_addresses.patch
 create mode 100644 
target/linux/atheros/patches-2.6.34/251-ar2315_use_physical_addresses.patch
 create mode 100644 
target/linux/atheros/patches-2.6.35/251-ar2315_use_physical_addresses.patch
 create mode 100644 
target/linux/atheros/patches-2.6.36/251-ar2315_use_physical_addresses.patch
 create mode 100644 
target/linux/atheros/patches-2.6.37/251-ar2315_use_physical_addresses.patch

diff --git 
a/target/linux/atheros/patches-2.6.32/251-ar2315_use_physical_addresses.patch 
b/target/linux/atheros/patches-2.6.32/251-ar2315_use_physical_addresses.patch
new file mode 100644
index 0000000..a32cfc1
--- /dev/null
+++ 
b/target/linux/atheros/patches-2.6.32/251-ar2315_use_physical_addresses.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/ar231x/ar2315.c
++++ b/arch/mips/ar231x/ar2315.c
+@@ -367,7 +367,7 @@
+       .reset_base = AR2315_RESET,
+       .reset_mac = AR2315_RESET_ENET0,
+       .reset_phy = AR2315_RESET_EPHY0,
+-      .phy_base = AR2315_ENET0,
++      .phy_base = KSEG1ADDR(AR2315_ENET0),
+       .config = &ar231x_board,
+ };
+ 
+@@ -405,13 +405,13 @@
+ static inline u32
+ spiflash_read_reg(int reg)
+ {
+-      return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg);
++      return ar231x_read_reg(AR2315_SPI + reg);
+ }
+ 
+ static inline void
+ spiflash_write_reg(int reg, u32 data)
+ {
+-      ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data);
++      ar231x_write_reg(AR2315_SPI + reg, data);
+ }
+ 
+ static u32
+@@ -540,7 +540,7 @@
+       ar2315_init_gpio();
+       platform_device_register(&ar2315_wdt);
+       platform_device_register(&ar2315_spiflash);
+-      ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS,
++      ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
+               &ar2315_eth_data);
+       ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+ 
+--- a/arch/mips/ar231x/pci.c
++++ b/arch/mips/ar231x/pci.c
+@@ -176,7 +176,7 @@
+       if (ar231x_devtype != DEV_TYPE_AR2315)
+               return -ENODEV;
+ 
+-      configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); 
/* Remap PCI config space */
++      configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 
1*1024*1024); /* Remap PCI config space */
+       ar231x_pci_controller.io_map_base =
+               (unsigned long) ioremap_nocache(AR531X_MEM_BASE + 
AR531X_MEM_SIZE, AR531X_IO_SIZE);
+       set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
+--- a/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
++++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
+@@ -27,14 +27,14 @@
+  * Address map
+  */
+ #define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
+-#define AR2315_WLAN0            0xB0000000      /* Wireless MMR */
+-#define AR2315_PCI              0xB0100000      /* PCI MMR */
+-#define AR2315_SDRAMCTL         0xB0300000      /* SDRAM MMR */
+-#define AR2315_LOCAL            0xB0400000      /* LOCAL BUS MMR */
+-#define AR2315_ENET0            0xB0500000      /* ETHERNET MMR */
+-#define AR2315_DSLBASE          0xB1000000      /* RESET CONTROL MMR */
+-#define AR2315_UART0            0xB1100003      /* UART MMR */
+-#define AR2315_SPI              0xB1300000      /* SPI FLASH MMR */
++#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
++#define AR2315_PCI              0x10100000      /* PCI MMR */
++#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
++#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
++#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
++#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
++#define AR2315_UART0            0x11100003      /* UART MMR */
++#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
+ #define AR2315_PCIEXT           0x80000000      /* pci external */
+ 
+ /*
diff --git 
a/target/linux/atheros/patches-2.6.34/251-ar2315_use_physical_addresses.patch 
b/target/linux/atheros/patches-2.6.34/251-ar2315_use_physical_addresses.patch
new file mode 100644
index 0000000..a32cfc1
--- /dev/null
+++ 
b/target/linux/atheros/patches-2.6.34/251-ar2315_use_physical_addresses.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/ar231x/ar2315.c
++++ b/arch/mips/ar231x/ar2315.c
+@@ -367,7 +367,7 @@
+       .reset_base = AR2315_RESET,
+       .reset_mac = AR2315_RESET_ENET0,
+       .reset_phy = AR2315_RESET_EPHY0,
+-      .phy_base = AR2315_ENET0,
++      .phy_base = KSEG1ADDR(AR2315_ENET0),
+       .config = &ar231x_board,
+ };
+ 
+@@ -405,13 +405,13 @@
+ static inline u32
+ spiflash_read_reg(int reg)
+ {
+-      return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg);
++      return ar231x_read_reg(AR2315_SPI + reg);
+ }
+ 
+ static inline void
+ spiflash_write_reg(int reg, u32 data)
+ {
+-      ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data);
++      ar231x_write_reg(AR2315_SPI + reg, data);
+ }
+ 
+ static u32
+@@ -540,7 +540,7 @@
+       ar2315_init_gpio();
+       platform_device_register(&ar2315_wdt);
+       platform_device_register(&ar2315_spiflash);
+-      ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS,
++      ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
+               &ar2315_eth_data);
+       ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+ 
+--- a/arch/mips/ar231x/pci.c
++++ b/arch/mips/ar231x/pci.c
+@@ -176,7 +176,7 @@
+       if (ar231x_devtype != DEV_TYPE_AR2315)
+               return -ENODEV;
+ 
+-      configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); 
/* Remap PCI config space */
++      configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 
1*1024*1024); /* Remap PCI config space */
+       ar231x_pci_controller.io_map_base =
+               (unsigned long) ioremap_nocache(AR531X_MEM_BASE + 
AR531X_MEM_SIZE, AR531X_IO_SIZE);
+       set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
+--- a/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
++++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
+@@ -27,14 +27,14 @@
+  * Address map
+  */
+ #define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
+-#define AR2315_WLAN0            0xB0000000      /* Wireless MMR */
+-#define AR2315_PCI              0xB0100000      /* PCI MMR */
+-#define AR2315_SDRAMCTL         0xB0300000      /* SDRAM MMR */
+-#define AR2315_LOCAL            0xB0400000      /* LOCAL BUS MMR */
+-#define AR2315_ENET0            0xB0500000      /* ETHERNET MMR */
+-#define AR2315_DSLBASE          0xB1000000      /* RESET CONTROL MMR */
+-#define AR2315_UART0            0xB1100003      /* UART MMR */
+-#define AR2315_SPI              0xB1300000      /* SPI FLASH MMR */
++#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
++#define AR2315_PCI              0x10100000      /* PCI MMR */
++#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
++#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
++#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
++#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
++#define AR2315_UART0            0x11100003      /* UART MMR */
++#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
+ #define AR2315_PCIEXT           0x80000000      /* pci external */
+ 
+ /*
diff --git 
a/target/linux/atheros/patches-2.6.35/251-ar2315_use_physical_addresses.patch 
b/target/linux/atheros/patches-2.6.35/251-ar2315_use_physical_addresses.patch
new file mode 100644
index 0000000..a32cfc1
--- /dev/null
+++ 
b/target/linux/atheros/patches-2.6.35/251-ar2315_use_physical_addresses.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/ar231x/ar2315.c
++++ b/arch/mips/ar231x/ar2315.c
+@@ -367,7 +367,7 @@
+       .reset_base = AR2315_RESET,
+       .reset_mac = AR2315_RESET_ENET0,
+       .reset_phy = AR2315_RESET_EPHY0,
+-      .phy_base = AR2315_ENET0,
++      .phy_base = KSEG1ADDR(AR2315_ENET0),
+       .config = &ar231x_board,
+ };
+ 
+@@ -405,13 +405,13 @@
+ static inline u32
+ spiflash_read_reg(int reg)
+ {
+-      return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg);
++      return ar231x_read_reg(AR2315_SPI + reg);
+ }
+ 
+ static inline void
+ spiflash_write_reg(int reg, u32 data)
+ {
+-      ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data);
++      ar231x_write_reg(AR2315_SPI + reg, data);
+ }
+ 
+ static u32
+@@ -540,7 +540,7 @@
+       ar2315_init_gpio();
+       platform_device_register(&ar2315_wdt);
+       platform_device_register(&ar2315_spiflash);
+-      ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS,
++      ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
+               &ar2315_eth_data);
+       ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+ 
+--- a/arch/mips/ar231x/pci.c
++++ b/arch/mips/ar231x/pci.c
+@@ -176,7 +176,7 @@
+       if (ar231x_devtype != DEV_TYPE_AR2315)
+               return -ENODEV;
+ 
+-      configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); 
/* Remap PCI config space */
++      configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 
1*1024*1024); /* Remap PCI config space */
+       ar231x_pci_controller.io_map_base =
+               (unsigned long) ioremap_nocache(AR531X_MEM_BASE + 
AR531X_MEM_SIZE, AR531X_IO_SIZE);
+       set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
+--- a/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
++++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
+@@ -27,14 +27,14 @@
+  * Address map
+  */
+ #define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
+-#define AR2315_WLAN0            0xB0000000      /* Wireless MMR */
+-#define AR2315_PCI              0xB0100000      /* PCI MMR */
+-#define AR2315_SDRAMCTL         0xB0300000      /* SDRAM MMR */
+-#define AR2315_LOCAL            0xB0400000      /* LOCAL BUS MMR */
+-#define AR2315_ENET0            0xB0500000      /* ETHERNET MMR */
+-#define AR2315_DSLBASE          0xB1000000      /* RESET CONTROL MMR */
+-#define AR2315_UART0            0xB1100003      /* UART MMR */
+-#define AR2315_SPI              0xB1300000      /* SPI FLASH MMR */
++#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
++#define AR2315_PCI              0x10100000      /* PCI MMR */
++#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
++#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
++#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
++#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
++#define AR2315_UART0            0x11100003      /* UART MMR */
++#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
+ #define AR2315_PCIEXT           0x80000000      /* pci external */
+ 
+ /*
diff --git 
a/target/linux/atheros/patches-2.6.36/251-ar2315_use_physical_addresses.patch 
b/target/linux/atheros/patches-2.6.36/251-ar2315_use_physical_addresses.patch
new file mode 100644
index 0000000..a32cfc1
--- /dev/null
+++ 
b/target/linux/atheros/patches-2.6.36/251-ar2315_use_physical_addresses.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/ar231x/ar2315.c
++++ b/arch/mips/ar231x/ar2315.c
+@@ -367,7 +367,7 @@
+       .reset_base = AR2315_RESET,
+       .reset_mac = AR2315_RESET_ENET0,
+       .reset_phy = AR2315_RESET_EPHY0,
+-      .phy_base = AR2315_ENET0,
++      .phy_base = KSEG1ADDR(AR2315_ENET0),
+       .config = &ar231x_board,
+ };
+ 
+@@ -405,13 +405,13 @@
+ static inline u32
+ spiflash_read_reg(int reg)
+ {
+-      return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg);
++      return ar231x_read_reg(AR2315_SPI + reg);
+ }
+ 
+ static inline void
+ spiflash_write_reg(int reg, u32 data)
+ {
+-      ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data);
++      ar231x_write_reg(AR2315_SPI + reg, data);
+ }
+ 
+ static u32
+@@ -540,7 +540,7 @@
+       ar2315_init_gpio();
+       platform_device_register(&ar2315_wdt);
+       platform_device_register(&ar2315_spiflash);
+-      ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS,
++      ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
+               &ar2315_eth_data);
+       ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+ 
+--- a/arch/mips/ar231x/pci.c
++++ b/arch/mips/ar231x/pci.c
+@@ -176,7 +176,7 @@
+       if (ar231x_devtype != DEV_TYPE_AR2315)
+               return -ENODEV;
+ 
+-      configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); 
/* Remap PCI config space */
++      configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 
1*1024*1024); /* Remap PCI config space */
+       ar231x_pci_controller.io_map_base =
+               (unsigned long) ioremap_nocache(AR531X_MEM_BASE + 
AR531X_MEM_SIZE, AR531X_IO_SIZE);
+       set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
+--- a/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
++++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
+@@ -27,14 +27,14 @@
+  * Address map
+  */
+ #define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
+-#define AR2315_WLAN0            0xB0000000      /* Wireless MMR */
+-#define AR2315_PCI              0xB0100000      /* PCI MMR */
+-#define AR2315_SDRAMCTL         0xB0300000      /* SDRAM MMR */
+-#define AR2315_LOCAL            0xB0400000      /* LOCAL BUS MMR */
+-#define AR2315_ENET0            0xB0500000      /* ETHERNET MMR */
+-#define AR2315_DSLBASE          0xB1000000      /* RESET CONTROL MMR */
+-#define AR2315_UART0            0xB1100003      /* UART MMR */
+-#define AR2315_SPI              0xB1300000      /* SPI FLASH MMR */
++#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
++#define AR2315_PCI              0x10100000      /* PCI MMR */
++#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
++#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
++#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
++#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
++#define AR2315_UART0            0x11100003      /* UART MMR */
++#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
+ #define AR2315_PCIEXT           0x80000000      /* pci external */
+ 
+ /*
diff --git 
a/target/linux/atheros/patches-2.6.37/251-ar2315_use_physical_addresses.patch 
b/target/linux/atheros/patches-2.6.37/251-ar2315_use_physical_addresses.patch
new file mode 100644
index 0000000..a32cfc1
--- /dev/null
+++ 
b/target/linux/atheros/patches-2.6.37/251-ar2315_use_physical_addresses.patch
@@ -0,0 +1,72 @@
+--- a/arch/mips/ar231x/ar2315.c
++++ b/arch/mips/ar231x/ar2315.c
+@@ -367,7 +367,7 @@
+       .reset_base = AR2315_RESET,
+       .reset_mac = AR2315_RESET_ENET0,
+       .reset_phy = AR2315_RESET_EPHY0,
+-      .phy_base = AR2315_ENET0,
++      .phy_base = KSEG1ADDR(AR2315_ENET0),
+       .config = &ar231x_board,
+ };
+ 
+@@ -405,13 +405,13 @@
+ static inline u32
+ spiflash_read_reg(int reg)
+ {
+-      return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg);
++      return ar231x_read_reg(AR2315_SPI + reg);
+ }
+ 
+ static inline void
+ spiflash_write_reg(int reg, u32 data)
+ {
+-      ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data);
++      ar231x_write_reg(AR2315_SPI + reg, data);
+ }
+ 
+ static u32
+@@ -540,7 +540,7 @@
+       ar2315_init_gpio();
+       platform_device_register(&ar2315_wdt);
+       platform_device_register(&ar2315_spiflash);
+-      ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS,
++      ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
+               &ar2315_eth_data);
+       ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+ 
+--- a/arch/mips/ar231x/pci.c
++++ b/arch/mips/ar231x/pci.c
+@@ -176,7 +176,7 @@
+       if (ar231x_devtype != DEV_TYPE_AR2315)
+               return -ENODEV;
+ 
+-      configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); 
/* Remap PCI config space */
++      configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT, 
1*1024*1024); /* Remap PCI config space */
+       ar231x_pci_controller.io_map_base =
+               (unsigned long) ioremap_nocache(AR531X_MEM_BASE + 
AR531X_MEM_SIZE, AR531X_IO_SIZE);
+       set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
+--- a/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
++++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
+@@ -27,14 +27,14 @@
+  * Address map
+  */
+ #define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
+-#define AR2315_WLAN0            0xB0000000      /* Wireless MMR */
+-#define AR2315_PCI              0xB0100000      /* PCI MMR */
+-#define AR2315_SDRAMCTL         0xB0300000      /* SDRAM MMR */
+-#define AR2315_LOCAL            0xB0400000      /* LOCAL BUS MMR */
+-#define AR2315_ENET0            0xB0500000      /* ETHERNET MMR */
+-#define AR2315_DSLBASE          0xB1000000      /* RESET CONTROL MMR */
+-#define AR2315_UART0            0xB1100003      /* UART MMR */
+-#define AR2315_SPI              0xB1300000      /* SPI FLASH MMR */
++#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
++#define AR2315_PCI              0x10100000      /* PCI MMR */
++#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
++#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
++#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
++#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
++#define AR2315_UART0            0x11100003      /* UART MMR */
++#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
+ #define AR2315_PCIEXT           0x80000000      /* pci external */
+ 
+ /*
-- 
1.7.1

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