Reduce code for MDIO access. Signed-off-by: Nathan Hintz <nlhi...@hotmail.com>
--- /dev/null +++ target/linux/brcm47xx/patches-3.2/236-bcma-reduce-mdio-ops.patch @@ -0,0 +1,103 @@ +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -57,10 +57,10 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static void bcma_pcie_mdio_op(struct bcma_drv_pci *pc, u8 device, u8 address, ++ bool write, u16 *data) + { + int max_retries = 10; +- u16 ret = 0; + u32 v; + int i; + +@@ -80,9 +80,17 @@ static u16 bcma_pcie_mdio_read(struct bc + v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD); + } + +- v = BCMA_CORE_PCI_MDIODATA_START; +- v |= BCMA_CORE_PCI_MDIODATA_READ; +- v |= BCMA_CORE_PCI_MDIODATA_TA; ++ if (!write) { ++ v = BCMA_CORE_PCI_MDIODATA_START; ++ v |= BCMA_CORE_PCI_MDIODATA_READ; ++ v |= BCMA_CORE_PCI_MDIODATA_TA; ++ *data = 0; ++ } else { ++ v = BCMA_CORE_PCI_MDIODATA_START; ++ v |= BCMA_CORE_PCI_MDIODATA_WRITE; ++ v |= BCMA_CORE_PCI_MDIODATA_TA; ++ v |= *data; ++ } + + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); + /* Wait for the device to complete the transaction */ +@@ -90,53 +98,28 @@ static u16 bcma_pcie_mdio_read(struct bc + for (i = 0; i < max_retries; i++) { + v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); + if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) { +- udelay(10); +- ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA); ++ if (!write) { ++ udelay(10); ++ *data = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA); ++ } + break; + } + msleep(1); + } + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); +- return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, +- u8 address, u16 data) ++static inline u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) + { +- int max_retries = 10; +- u32 v; +- int i; +- +- /* enable mdio access to SERDES */ +- v = BCMA_CORE_PCI_MDIOCTL_PREAM_EN; +- v |= BCMA_CORE_PCI_MDIOCTL_DIVISOR_VAL; +- pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, v); +- +- if (pc->core->id.rev >= 10) { +- max_retries = 200; +- bcma_pcie_mdio_set_phy(pc, device); +- v = (BCMA_CORE_PCI_MDIODATA_DEV_ADDR << +- BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF); +- v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF); +- } else { +- v = (device << BCMA_CORE_PCI_MDIODATA_DEVADDR_SHF_OLD); +- v |= (address << BCMA_CORE_PCI_MDIODATA_REGADDR_SHF_OLD); +- } ++ u16 data; ++ bcma_pcie_mdio_op(pc, device, address, false, &data); ++ return data; ++} + +- v = BCMA_CORE_PCI_MDIODATA_START; +- v |= BCMA_CORE_PCI_MDIODATA_WRITE; +- v |= BCMA_CORE_PCI_MDIODATA_TA; +- v |= data; +- pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); +- /* Wait for the device to complete the transaction */ +- udelay(10); +- for (i = 0; i < max_retries; i++) { +- v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); +- if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) +- break; +- msleep(1); +- } +- pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); ++static inline void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_op(pc, device, address, true, &data); + } + + /************************************************** _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel