This patch adds board support for the D-link DIR 632 router (hardware version
A1) based on trunk r36419.

Signed-off-by: Andrew McDonnell <b...@andrewmcdonnell.net>
---
This patch alone does not enable ethernet and switch support; patch 2/2
following adds support for the AG7242+RTL8309+S26 necessary to complete
support for this router.  Together the patches should allow tickets 13079 and
13069 to be closed.

USB tested OK using USB storage.
LEDs tested OK.
SPI flash tested OK.
Note: the bi-colour LEDS for status/power and WAN only work in orange and not
green (for power/status) and green and not orange (for WAN).

target/linux/ar71xx/base-files/etc/diag.sh         |    3 +
 .../ar71xx/base-files/etc/uci-defaults/01_leds     |    6 +
 .../ar71xx/base-files/etc/uci-defaults/02_network  |    8 +
 .../etc/uci-defaults/03_network-switchX-migration  |    1 +
 target/linux/ar71xx/base-files/lib/ar71xx.sh       |    3 +
 .../ar71xx/base-files/lib/upgrade/platform.sh      |    1 +
 target/linux/ar71xx/config-3.8                     |   29 ++-
 .../ar71xx/files/arch/mips/ath79/mach-dir-632-a1.c |  394 ++++++++++++++++++++
 .../mips/include/asm/mach-ath79/ag71xx_platform.h  |    6 +
 target/linux/ar71xx/generic/profiles/d-link.mk     |   11 +
 target/linux/ar71xx/image/Makefile                 |   12 +
 .../617-MIPS-ath79-add-DIR-632-A1-support.patch    |   47 +++

diff --git a/target/linux/ar71xx/base-files/etc/diag.sh
b/target/linux/ar71xx/base-files/etc/diag.sh
index c107f41..fa0c476 100755
@@ -47,6 +47,9 @@ get_status_led() {
        dir-615-e4)
                status_led="d-link:green:power"
                ;;
+       dir-632-a1)
+               status_led="d-link:amber:power"
+               ;;
        dir-615-c1)
                status_led="d-link:green:status"
                ;;
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
index afeae42..e023ba8 100755
@@ -60,6 +60,12 @@ dir-615-e4)
        ucidef_set_led_switch "lan4" "LAN4" "d-link:green:lan4" "switch0" "0x10"
        ;;

+dir-632-a1)
+       ucidef_set_led_usbdev "usb" "USB" "d-link:green:usb" "1-1"
+       ucidef_set_led_netdev "wan" "WAN" "d-link:green:wan" "eth1"
+       ucidef_set_led_wlan "wlan" "WLAN" "d-link:green:wireless" "phy0tpt"
+       ;;
+
 dir-825-b1 | \
 dir-825-c1)
        ucidef_set_led_usbdev "usb" "USB" "d-link:blue:usb" "1-1"
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
index 0329ea5..9bd2f07 100755
@@ -214,6 +214,14 @@ wpe72)
        ucidef_set_interfaces_lan_wan "eth1" "eth0"
        ;;

+dir-632-a1)
+       ucidef_set_interfaces_lan_wan "eth0" "eth1"
+       ucidef_add_switch "switch0" "1" "1"
+       ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 4 5 6 7 8"
+  ;;
+
+
+
 ap121 |\
 ap121-mini |\
 ap96 |\
diff --git
a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration
b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration
index 718a924..3bf74fe 100755
@@ -57,6 +57,7 @@ ap121-mini|\
 ap96|\
 airrouter|\
 dir-600-a1|\
+dir-632-a1|\
 dir-615-c1|\
 dir-615-e4|\
 ja76pf|\
diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh
b/target/linux/ar71xx/base-files/lib/ar71xx.sh
index a9e063b..cb8b642 100755
@@ -219,6 +219,9 @@ ar71xx_board_detect() {
        *"DIR-615 rev. E4")
                name="dir-615-e4"
                ;;
+       *"DIR-632 rev. A1")
+               name="dir-632-a1"
+               ;;
        *"DIR-825 rev. B1")
                name="dir-825-b1"
                ;;
diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
index 8f2f610..7e7d05d 100755
@@ -108,6 +108,7 @@ platform_check_image() {
        dir-600-a1 | \
        dir-615-c1 | \
        dir-615-e4 | \
+       dir-632-a1 | \
        dir-825-c1 | \
        dir-835-a1 | \
        ew-dorin | \
diff --git a/target/linux/ar71xx/config-3.8 b/target/linux/ar71xx/config-3.8
index 847b9a5..02147bd 100644
@@ -2,6 +2,27 @@ CONFIG_AG71XX=y
 CONFIG_AG71XX_AR8216_SUPPORT=y
 # CONFIG_AG71XX_DEBUG is not set
 # CONFIG_AG71XX_DEBUG_FS is not set
+CONFIG_AG7240=y
+# CONFIG_AG7240_GE0_GMII is not set
+CONFIG_AG7240_GE0_IS_CONNECTED=y
+CONFIG_AG7240_GE0_MII=y
+# CONFIG_AG7240_GE0_RGMII is not set
+CONFIG_AG7240_GE1_IS_CONNECTED=y
+CONFIG_AG7240_GE1_MII=y
+CONFIG_AG7240_MAC_LOCATION=0x1fff0000
+CONFIG_AG7240_NUMBER_RX_PKTS=252
+CONFIG_AG7240_NUMBER_TX_PKTS=80
+# CONFIG_AG7240_USE_TRC is not set
+CONFIG_AR7240_S26_PHY=y
+# CONFIG_AR7240_S26_VLAN_IGMP is not set
+# CONFIG_AR7242_RGMII_PHY is not set
+CONFIG_AR7242_RTL8309G_PHY=y
+# CONFIG_AR7242_S16_PHY is not set
+# CONFIG_AR7242_VIR_PHY is not set
+# CONFIG_AR8021_PHY is not set
+CONFIG_AG7240_LEN_PER_TX_DS=1536
+CONFIG_AG7240_NUMBER_TX_PKTS=80
+CONFIG_AG7240_NUMBER_RX_PKTS=252
 CONFIG_AR8216_PHY=y
 CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
 CONFIG_ARCH_DISCARD_MEMBLOCK=y
@@ -38,6 +59,7 @@ CONFIG_ATH79_MACH_CAP4200AG=y
 CONFIG_ATH79_MACH_DB120=y
 CONFIG_ATH79_MACH_DIR_600_A1=y
 CONFIG_ATH79_MACH_DIR_615_C1=y
+CONFIG_ATH79_MACH_DIR_632_A1=y
 CONFIG_ATH79_MACH_DIR_825_B1=y
 CONFIG_ATH79_MACH_DIR_825_C1=y
 CONFIG_ATH79_MACH_EAP7660D=y
@@ -97,6 +119,8 @@ CONFIG_ATH79_NVRAM=y
 CONFIG_ATH79_PCI_ATH9K_FIXUP=y
 CONFIG_ATH79_ROUTERBOOT=y
 # CONFIG_ATH79_WDT is not set
+# CONFIG_ATHEROS_HEADER_EN is not set
+# CONFIG_ATHRS_QOS is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_CEVT_R4K=y
 CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd"
@@ -189,12 +213,9 @@ CONFIG_MIPS_MT_DISABLED=y
 CONFIG_MODULES_USE_ELF_REL=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_M25P80=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
 CONFIG_MTD_MYLOADER_PARTS=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
@@ -208,6 +229,7 @@ CONFIG_NET_DSA=y
 CONFIG_NET_DSA_MV88E6060=y
 CONFIG_NET_DSA_MV88E6063=y
 CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_SCH_FQ_CODEL=y
 CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_PCI=y
@@ -224,6 +246,7 @@ CONFIG_RTL8366RB_PHY=y
 CONFIG_RTL8366S_PHY=y
 CONFIG_RTL8366_SMI=y
 CONFIG_RTL8367_PHY=y
+# CONFIG_S26_SWITCH_ONLY_MODE is not set
 # CONFIG_SCSI_DMA is not set
 CONFIG_SERIAL_8250_NR_UARTS=1
 CONFIG_SERIAL_8250_RUNTIME_UARTS=1
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-632-a1.c
b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-632-a1.c
new file mode 100644
@@ -0,0 +1,394 @@
+/*
+ *  D-Link DIR-632 rev. A1 board support
+ *
+ *  Copyright (C) 2013 Andrew McDonnell <b...@andrewmcdonnell.net>
+ *  Copyright (C) 2010-2012 Gabor Juhos <juh...@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <linux/ar8216_platform.h>
+#include "common.h"
+#include "dev-common.h"
+#include "dev-eth.h"
+#include "dev-m25p80.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-ap9x-pci.h"
+#include "dev-usb.h"
+#include "machtypes.h"
+#include "nvram.h"
+
+/* Set the following to zero to have a look at actual RAM when trying to find
MAC addresses, etc. */
+#define DEBUG_CHECK_MEMORY_CONTENTS 1
+
+  /* Various in-memory items of interest:
+   *
+   * Memory     Flash     Description
+   * 1f040000   040000    u-boot environment variables
+   * 1ffb0004   7b0004    ASCII MAC address matching the case sticker.
+   *                      I suspect this is 'fixed' when you first execute
+   *                      setenv mac= in u-boot (which I inadvertently did)
+   *                      (mtd "MAC" partition)
+   * 1ffe0000   7e0000    NVRAM  (area prefix: "HSLF")
+   *                      (partway through factory mtd "LP" partition)
+   * 1fff0000   7f0000    Hardware MAC address for eth0, according to source
+   *                      code of DD-WRT and zRouter, except this MAC address
+   *                      is _different_ to the stickered MAC address.
+   *                      (mtd "ART" partition)
+   * 1fff0006   7f0006    Hardware MAC address for eth1, according to source
+   *                      code of DD-WRT and zRouter, except this MAC address
+   *                      is set to ff:ff:ff:ff:ff:ff in my router.
+   * 1ff10000   7f1000    PCI EEPROM - "calibration data"
+   * 1ff1010c   7f110c    PCI EEPROM - WLAN mac address reported in DD-WRT
+   *                      In my board this is set to 00:00:22:22:22:22
+   *                      Which happens to be the same as the NVRAM value
+   *                      ath_hwaddr
+   */
+
+/* Network architecture:
+ *
+ * eth0 --> 8309 switch - LAN
+ * eth1 --> S26 switch - WAN
+ * wlan0 --> PCI ath9k driver
+ */
+
+#define ADDR_UBOOT   0x1f040000
+#define ADDR_AMAC    0x1ffb0000
+#define ADDR_NVRAM   0x1ffe0000
+#define ADDR_HMAC    0x1fff0000
+#define ADDR_PCIBASE 0x1fff0000
+#define ADDR_EEPROM  0x1fff1000
+
+#define EEPROM_WLAN_MAC_OFFSET 0x10c
+
+#define NVRAM_SIZE 0x10000
+
+#define DIR632_MAC0_OFFSET     0
+#define DIR632_MAC1_OFFSET     6
+
+#define DIR632_AMAC_OFFSET     4
+
+/*
+
+ LED Definitions, derived from
+
+ 
http://zrouter.org/projects/zrouter/repository/entry/boards/D-Link/DIR-632/GPIO
+
http://zrouter.org/projects/zrouter/repository/entry/boards/D-Link/DIR-632/board.hints
+
+ and from practical experimentation using the DD-WRT generic_leds.
+
+ Known GPIO Pins:
+ 0     LED     WPS
+ 1     LED     STATUS Yellow
+ 6     LED     STATUS Green  - not currently working as expected
+ 7     LED     Internet      - not currently working as expected
+ 8     BUTTON  Reset
+ 9     UART
+ 10    UART
+ 11    LED     USB
+ 12 BUTTON     WPS
+ 17    LED     Internet Bi
+
+ 32 Wifi
+
+ Active low have a flags of 0x102 otherwise 0x2 in zRouter board.hints
+
+*/
+
+#define DIR_632_A1_GPIO_LED_WPS                        0              // Tested
+#define DIR_632_A1_GPIO_LED_POWER_AMBER                1        // Tested
+#define DIR_632_A1_GPIO_LED_POWER_GREEN                6
+#define DIR_632_A1_GPIO_LED_WAN_AMBER          7
+#define DIR_632_A1_GPIO_LED_USB                11               // Tested
+#define DIR_632_A1_GPIO_LED_WAN_GREEN          17         // Tested
+#define DIR_632_A1_GPIO_LED_WIRELESS 32            // Tested
+
+#define DIR_632_A1_WLAN_GPIO_LED                       0              // Tested
+
+
+#define DIR_632_A1_GPIO_BTN_RESET              8
+#define DIR_632_A1_GPIO_BTN_WPS                        12
+
+#define DIR_632_A1_KEYS_POLL_INTERVAL          20      /* msecs */
+#define DIR_632_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_632_A1_KEYS_POLL_INTERVAL)
+
+static struct gpio_led dir_632_a1_leds_gpio[] __initdata = {
+       {
+               .name           = "d-link:blue:wps",
+               .gpio           = DIR_632_A1_GPIO_LED_WPS,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:amber:power",
+               .gpio           = DIR_632_A1_GPIO_LED_POWER_AMBER,
+    .default_state = LEDS_GPIO_DEFSTATE_KEEP,
+       }, {
+               .name           = "d-link:green:power",
+               .gpio           = DIR_632_A1_GPIO_LED_POWER_GREEN,
+               //.active_low   = 1,
+       }, {
+               .name           = "d-link:amber:wan",
+               .gpio           = DIR_632_A1_GPIO_LED_WAN_AMBER,
+               //.active_low   = 1,
+       }, {
+               .name           = "d-link:green:wan",
+               .gpio           = DIR_632_A1_GPIO_LED_WAN_GREEN,
+               .active_low     = 1,
+       }, {
+               .name           = "d-link:green:usb",
+               .gpio           = DIR_632_A1_GPIO_LED_USB,
+               .active_low     = 1,
+       },
+};
+
+static struct gpio_keys_button dir_632_a1_gpio_keys[] __initdata = {
+       {
+               .desc           = "reset", // tested OK, using  cat 
/sys/kernel/debug/gpio/
+               .type           = EV_KEY,
+               .code           = KEY_RESTART,
+               .debounce_interval = DIR_632_A1_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = DIR_632_A1_GPIO_BTN_RESET,  /* Note, zrouter 
flags is 0x4a1, if
this doesnt work ... */
+               .active_low     = 1,
+       }, {
+               .desc           = "wps",  // tested OK, using  cat 
/sys/kernel/debug/gpio/
+               .type           = EV_KEY,
+               .code           = KEY_WPS_BUTTON,
+               .debounce_interval = DIR_632_A1_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = DIR_632_A1_GPIO_BTN_WPS,    /* Note, zrouter 
flags is 0x4a1, if
this doesnt work ... */
+               .active_low     = 1,
+       }
+};
+
+static struct ar8327_pad_cfg dir632_ar8327_pad0_cfg = {
+       .mode = AR8327_PAD_MAC_RGMII,
+       .txclk_delay_en = true,
+       .rxclk_delay_en = true,
+       .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+       .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ };
+
+static struct ar8327_platform_data dir632_ar8327_data = {
+       .pad0_cfg = &dir632_ar8327_pad0_cfg,
+       .port0_cfg = {
+               .force_link = 1,
+
+               .speed = AR8327_PORT_SPEED_1000,
+               .duplex = 1,
+               .txpause = 1,
+               .rxpause = 1,
+       },
+ };
+
+static struct mdio_board_info dir632_mdio0_info[] = {
+       {
+               .bus_id = "ag71xx-mdio.0",
+               .phy_addr = 0,
+               .platform_data = &dir632_ar8327_data,
+       },
+ };
+
+/* At 0x1000 in the upper 64K of memory of my DIR632 is PCI EEPROM information.
+ * However DD-WRT does a scan at the start of each 0x1000 of the entire 64k,
+ * so we do just in case. */
+static void *dir_632_a1_get_eeprom_caldata(int slot)
+{
+  u8 *base;
+  for (base=(u8 *)KSEG1ADDR(0x1f000000);base<(u8
*)KSEG1ADDR(0x1ffff000);base+=0x1000) {
+    u32 *cal = (u32 *)base;
+    if (*cal==0xa55a0000 || *cal==0x5aa50000) {
+      /* protection bit is always zero on inflash devices, so we can use for
match it */
+      if (slot) {
+        base+=0x4000;
+      }
+      pr_info("dir632: found PCI EEPROM for slot %d at %p\n",slot,base);
+      return base;
+    }
+  }
+  return NULL;
+}
+
+static int is_mac_all_ones(u8* mac) {
+  return !memcmp(mac,"\xff\xff\xff\xff\xff\xff",6);
+}
+
+static int is_mac_all_zeros(u8* mac) {
+  return !memcmp(mac,"\x0\x0\x0\x0\x0\x0",6);
+}
+
+static int is_mac_ok(u8* mac) {
+  return !is_mac_all_zeros(mac) && !is_mac_all_ones(mac) &&
memcmp(mac,"\x08\x0\x0\x0\x0\x0",6);
+}
+
+static struct ag7240_platform_data ath79_ag7240_eth_data;
+
+static struct platform_device ath79_ag7240_eth_device = {
+       .name           = "ag7240",
+       .id             = 0,
+       .dev = {
+               .platform_data = &ath79_ag7240_eth_data,
+       },
+};
+
+static struct flash_platform_data dir_632_a1_flash = {
+  .type           = "mx25l6405d",
+};
+
+/*
+ * Platform initialisation for the DIR-632-A1 mainboard.
+ *
+ * Here we set platform-specific data for each device that may be loaded later.
+ *
+ * This router has:
+ * (a) AG7240 ethernet
+ *     eth0: connected to RTL8309G, physically to 8-port switch
+ *     eth1: connected vi internal S26 switch to WAN port
+ * (b) mdio port - bus used to control the switches (I think)
+ * (c) ath9k wireless - on PCI bus
+ * (d) USB2
+ * (e) serial port
+ * (f) GPIO - buttons - WPS button and Reset button, of course with OpenWRT
+ *            you can change these to whatever you want
+ * (g) GPIO - leds - 8 switch LEDS controlled by ag7240 driver
+ *                 - power/status - can be green or orange in factory firmware
+ *                 - WAN - can be green or orange in factory firmware
+ *                 - WLAN - green - controlled by ath9k driver
+ *                 - WPS - blue
+ *                 - USB - green
+ * (h) Watchdog timer
+ * The board also has two extra placeholders for other LEDS so it hopefully
+ * will be possible to buzz these out and use them as spare GPIO in the future
+ * (i) Flash - SPI controlled flash, 8MB
+ *
+ * MAC addresses:
+ *
+ * The factory firmware reads an ASCII MAC address from the MAC partition
+ * and seems to assign it to all ports.  Note that DD-WRT reads the wireless 
MAC
+ * 00:00:22:22:22:22 from the ART partition in the Atheros PCI 'eeprom' data
+ * (see http://wiki.openwrt.org/doc/howto/restore_art_partition )
+ * so it appears that D-link just ignore this and replace it with the stickered
+ * MAC as well.
+ *
+ * However a _different_ MAC is binary encoded in the start of the ART 
partition
+ * and this us assigned to eth0 and eth1 by uboot!
+ *
+ * So I am not really sure what the correct algorithm is for selecting all 
this!
+ *
+ * Looking at other similar boards, whoever ported them to OpenWRT chose to
+ * do different things...
+ */
+static void __init dir_632_a1_setup(void)
+{
+
+  const char *nvram = (char *)KSEG1ADDR(ADDR_NVRAM);
+       u8 *ee = (u8 *)KSEG1ADDR(ADDR_PCIBASE);   /* PCI Cal data - will be set 
by
getCalData() */
+  u8 mac_buffer[6];
+       u8 *wmac = NULL; /* This may end up with a MAC address to pass through 
to
ath9k for it to use instead of PCI calibration data */
+  u8 *art = (u8 *)KSEG1ADDR(ADDR_HMAC);      /* Early-hardware MAC addresses */
+       u8 *hmac = NULL;
+
+#if DEBUG_CHECK_MEMORY_CONTENTS
+  print_hex_dump(KERN_DEBUG, "uboot args: ", DUMP_PREFIX_ADDRESS, 16, 1,
(u8*)KSEG1ADDR(ADDR_UBOOT), 64, true);
+  print_hex_dump(KERN_DEBUG, "nvram:      ", DUMP_PREFIX_ADDRESS, 16, 1,
(u8*)KSEG1ADDR(ADDR_NVRAM), 64, true);
+  print_hex_dump(KERN_DEBUG, "art:        ", DUMP_PREFIX_ADDRESS, 16, 1,
(u8*)KSEG1ADDR(ADDR_HMAC), 64, true);
+  print_hex_dump(KERN_DEBUG, "pci eeprom: ", DUMP_PREFIX_ADDRESS, 16, 1,
(u8*)KSEG1ADDR(ADDR_EEPROM), 64, true);
+  print_hex_dump(KERN_DEBUG, "boxmac    : ", DUMP_PREFIX_ADDRESS, 16, 1,
(u8*)KSEG1ADDR(ADDR_AMAC), 64, true);
+#endif
+
+  /* Depending on the factory firmware prior usage, there may be a MAC
address for the WLAN */
+  if (ath79_nvram_parse_mac_addr(nvram, NVRAM_SIZE,"ath0_hwaddr=",
mac_buffer) == 0) {
+    wmac = mac_buffer;
+    pr_debug("dir_632_a1_setup(): NVRAM ath0_hwaddr=%pM", wmac);
+  }
+
+  if (mac_pton( (char*) ((u8*)KSEG1ADDR(ADDR_AMAC)+DIR632_AMAC_OFFSET),
mac_buffer)) {
+    if (!(is_mac_all_ones(mac_buffer) || is_mac_all_zeros(mac_buffer))) {
+      // use this instead for WLAN and for Eth? what is the desired behaviour?
+      // for now apply to WLAN
+      wmac = mac_buffer;
+      pr_debug("dir_632_a1_setup(): ASCII (uboot-set) mac=%pM", wmac);
+    }
+  }
+
+  /* If we use the ar71xx_ag7240 driver that came with Attitude Adjustment,
+   * the network just doesnt work, cant find PHY, etc.
+   * Instead, we ported the ag7240 driver from DD-WRT, which does work.
+   * But it turns out we still need the following settings.
+   */
+       ath79_register_mdio(0, 0);
+       mdiobus_register_board_info(dir632_mdio0_info, 
ARRAY_SIZE(dir632_mdio0_info));
+
+  /* GMAC0 is connected to the RTL8309G switch (8-port switch) */
+       ath79_init_mac(ath79_ag7240_eth_data.mac_addr1, art + 
DIR632_MAC0_OFFSET, 0);
+  pr_info("DIR-632-A1 using eth0 mac=%pM\n", ath79_ag7240_eth_data.mac_addr1);
+
+  /* GMAC1 is connected to the internal S26 switch */
+  /* If a mac address is in the ART, use it, otherwise, offset by one */
+  hmac = art + DIR632_MAC1_OFFSET;
+  if (is_mac_all_ones(hmac)) {
+    ath79_init_mac(ath79_ag7240_eth_data.mac_addr2, art + DIR632_MAC0_OFFSET, 
1);
+  } else {
+    ath79_init_mac(ath79_ag7240_eth_data.mac_addr2, art + DIR632_MAC1_OFFSET, 
0);
+  }
+  pr_info("DIR-632-A1 using eth1 mac=%pM\n", ath79_ag7240_eth_data.mac_addr2);
+
+  platform_device_register(&ath79_ag7240_eth_device);
+
+  ath79_register_m25p80(&dir_632_a1_flash);
+
+       ath79_gpio_function_disable(
+            AR71XX_GPIO_FUNC_STEREO_EN |
+            AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
+                                   AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
+                                   AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
+                                   AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
+                                   AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
+
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_632_a1_leds_gpio),
+                                dir_632_a1_leds_gpio);
+
+       ath79_register_gpio_keys_polled(-1, DIR_632_A1_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(dir_632_a1_gpio_keys),
+                                       dir_632_a1_gpio_keys);
+
+  /* We have usb */
+  ath79_register_usb();
+
+  /* Pass on data for the WLAN PCI device: */
+       ee = dir_632_a1_get_eeprom_caldata(0);
+       if (ee && !wmac) {
+    /* If no value in NVRAM for wireless, check if there is a valid MAC address
+     * in the PCI EEPROM. If so, and it is valid we do nothing.
+     * If not valid, then look in the ART instead for an address to pass
along. */
+    if (!is_mac_ok(ee+EEPROM_WLAN_MAC_OFFSET)) {
+               pr_warn("Found empty wireless MAC address in calibration 
dataset, leave
the responsibility to the driver to use the correct one.\n");
+               wmac = ee - 0x1000;  /* This implies the possibility in this 
architecture
that there could be a second PCI slot and the MAC is 0x1000 below it... */
+         }
+    /* Check the value in the ART is valid before allowing it to be used. For
some reason we don't check 08:00:00:00:00:00 */
+    if (wmac && (is_mac_all_ones(wmac) || is_mac_all_zeros(wmac))) {
+      pr_warn("Found empty wireless MAC address in ART, leave the
responsibility to the driver to use the correct one\n");
+               wmac = NULL;
+         }     
+       }
+  if (wmac) {
+    pr_info("DIR-632-A1 user set wmac=%pM", wmac);
+  }
+
+  /* inform the ath9k which of its GPIO the WLAN LED is on */
+  ap9x_pci_setup_wmac_led_pin(0, DIR_632_A1_WLAN_GPIO_LED); // if this doesnt
work, go back and traceit through again - reg values match, so only base? c/f
set_wl0_led DDWRT
+
+  /* inform the ath9k what wmac to use and where to find its radio cal data */
+  /* also initialises PCI bus */
+       ap91_pci_init(ee, wmac);
+
+  /* uart, gpio base and wdt are init from ath79/setup.c */
+}
+
+MIPS_MACHINE(ATH79_MACH_DIR_632_A1, "DIR-632-A1", "D-Link DIR-632 rev. A1",
+            dir_632_a1_setup);
+
diff --git
a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
index 656a6ef..3002601 100644
@@ -22,6 +22,12 @@ struct ag71xx_switch_platform_data {
        u8              phy_poll_mask;
 };

+struct ag7240_platform_data {
+       u8              mac_addr1[ETH_ALEN];
+       u8              mac_addr2[ETH_ALEN];
+};
+
+
 struct ag71xx_platform_data {
        phy_interface_t phy_if_mode;
        u32             phy_mask;
diff --git a/target/linux/ar71xx/generic/profiles/d-link.mk
b/target/linux/ar71xx/generic/profiles/d-link.mk
index f30e9b1..8c371a3e 100644
@@ -50,6 +50,17 @@ endef

 $(eval $(call Profile,DIR615E4))

+define Profile/DIR632A1
+       NAME:=D-Link DIR-632 rev. A1
+       PACKAGES:=kmod-usb-core kmod-usb2 kmod-ledtrig-usbdev
+endef
+
+define Profile/DIR632A1/Description
+       Package set optimized for the D-Link DIR-632 rev. A1
+endef
+
+$(eval $(call Profile,DIR632A1))
+

 define Profile/DIR825B1
        NAME:=D-Link DIR-825 rev. B1
diff --git a/target/linux/ar71xx/image/Makefile
b/target/linux/ar71xx/image/Makefile
index 7522926..eeaec51 100644
@@ -174,6 +174,7 @@
cameo933x_mtdlayout=mtdparts=spi0.0:64k(u-boot)ro,64k(art)ro,64k(mac)ro,64k(nvra
 
cameo934x_mtdlayout=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,1280k(kernel),14656k(rootfs),192k(lang)ro,64k(mac)ro,64k(art)ro,15936k@0x20000(firmware)
 
cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art),13632k@0xa0000(firmware)
 
db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
+dir632a1_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(nvram),1984k(linux),5568k(rootfs),64k(MAC),192k(LP),64k(ART)ro,7488k@0x50000(firmware)
debug loglevel=8
 
dir825b1_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,1024k(kernel),5184k(rootfs),64k(caldata)ro,1600k(unknown)ro,6208k@0x50000(firmware),64k@0x7f0000(caldata_copy)
 
dir825b1_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,1024k(kernel),6784k(rootfs),64k(caldata)ro,7808k@0x50000(firmware),64k@0x660000(caldata_orig),6208k@0x50000(firmware_orig)
 
ew-dorin_mtdlayout_4M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),1024k(kernel),2688k(rootfs),64k(art),3712k@0x50000(firmware)
@@ -358,6 +359,15 @@ define Image/Build/Cameo933x/initramfs
        $(call MkuImageLzma/initramfs,$(2),$(3) $(cameo933x_mtdlayout))
 endef

+define Image/Build/DIR632A1
+       $(call
Image/Build/Cameo,$(1),$(2),$(3),$(dir632a1_mtdlayout),2031616,5636096,$(4))
+endef
+
+define Image/Build/DIR632A1/initramfs
+       $(call MkuImageLzma/initramfs,$(2),$(3) $(dir632a1_mtdlayout))
+endef
+
+
 define Image/Build/Cameo934x
        $(call
Image/Build/Cameo,$(1),$(2),$(3),$(cameo934x_mtdlayout),1310720,15007718,$(4))
 endef
@@ -863,6 +873,8 @@ $(eval $(call
SingleProfile,Cameo934x,$(fs_64k),DIR835A1,dir-835-a1,DIR-835-A1,t

 $(eval $(call
SingleProfile,CyberTAN,$(fs_64k),WRT160NL,wrt160nl,WRT160NL,ttyS0,115200,1.00.01))

+$(eval $(call
SingleProfile,DIR632A1,$(fs_squash),DIR632A1,dir-632-a1,DIR-632-A1,ttyS0,115200,"A101-AR7242-RT-100324-02"))
+
 $(eval $(call
SingleProfile,DIR825B1,$(fs_64k),DIR825B1,dir-825-b1,DIR-825-B1,ttyS0,115200,01AP94-AR7161-RT-080619-00,00AP94-AR7161-RT-080619-00))
 $(eval $(call
SingleProfile,DIR825B1,$(fs_64k),TEW673GRU,tew-673gru,TEW-673GRU,ttyS0,115200,01AP94-AR7161-RT-080619-01,00AP94-AR7161-RT-080619-01))

diff --git
a/target/linux/ar71xx/patches-3.8/617-MIPS-ath79-add-DIR-632-A1-support.patch
b/target/linux/ar71xx/patches-3.8/617-MIPS-ath79-add-DIR-632-A1-support.patch
new file mode 100644
@@ -0,0 +1,47 @@
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -273,6 +273,16 @@ config ATH79_MACH_DIR_615_C1
+       select ATH79_DEV_WMAC
+       select ATH79_NVRAM
+
++config ATH79_MACH_DIR_632_A1
++      bool "D-Link DIR-632 rev. A1 support"
++      select SOC_AR724X
++      select ATH79_DEV_ETH
++      select ATH79_DEV_GPIO_BUTTONS
++      select ATH79_DEV_LEDS_GPIO
++      select ATH79_DEV_M25P80
++      select ATH79_DEV_USB
++      select ATH79_NVRAM
++
+ config ATH79_MACH_DIR_825_B1
+       bool "D-Link DIR-825 rev. B1 board support"
+       select SOC_AR71XX
+@@ -751,6 +761,7 @@ config ATH79_DEV_DSA
+       def_bool n
+
+ config ATH79_DEV_ETH
++      select AG7240 if ATH79_MACH_DIR_632_A1
+       def_bool n
+
+ config ATH79_DEV_M25P80
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -38,6 +38,7 @@ enum ath79_mach_type {
+       ATH79_MACH_DIR_600_A1,          /* D-Link DIR-600 rev. A1 */
+       ATH79_MACH_DIR_615_C1,          /* D-Link DIR-615 rev. C1 */
+       ATH79_MACH_DIR_615_E4,          /* D-Link DIR-615 rev. E4 */
++      ATH79_MACH_DIR_632_A1,          /* D-Link DIR-632 rev. A1 */
+       ATH79_MACH_DIR_825_B1,          /* D-Link DIR-825 rev. B1 */
+       ATH79_MACH_DIR_825_C1,          /* D-Link DIR-825 rev. C1 */
+       ATH79_MACH_DIR_835_A1,          /* D-Link DIR-835 rev. A1 */
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -54,6 +54,7 @@ obj-$(CONFIG_ATH79_MACH_CAP4200AG)   += ma
+ obj-$(CONFIG_ATH79_MACH_DB120)                += mach-db120.o
+ obj-$(CONFIG_ATH79_MACH_DIR_600_A1)   += mach-dir-600-a1.o
+ obj-$(CONFIG_ATH79_MACH_DIR_615_C1)   += mach-dir-615-c1.o
++obj-$(CONFIG_ATH79_MACH_DIR_632_A1)   += mach-dir-632-a1.o
+ obj-$(CONFIG_ATH79_MACH_DIR_825_B1)   += mach-dir-825-b1.o
+ obj-$(CONFIG_ATH79_MACH_DIR_825_C1)   += mach-dir-825-c1.o
+ obj-$(CONFIG_ATH79_MACH_EW_DORIN)     += mach-ew-dorin.o
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