Hello guys, I got no response here in this mailing list to my last e-mail regarding to the reset patch. The problem is still active and it also concerns the trunk version. Please also see the corresponding ticket: https://dev.openwrt.org/ticket/17839
The patch which I used for BB is also available by the following download link, if you prefer this way: http://www.ctb.co.at/download/OpenWRT/14.07-rf/ar71xx/generic/903-MIPS-ath79-fix-restart.patch Is there a special reason why this patch gets not accepted? Michael --- This patch fixes the reset bug on the ar71xx platform. The reboot command causes sometimes hanging routers with TL-WDR3600 (HW V1.5) and TL-WDR4300 (HW V1.7) platforms and probably also on other devices. Sometimes a reboot is successful, sometimes not and a power cycle of the device is required. This patch runs an endless loop when the mask for the FULL_CHIP_RESET gets set, the write to the reset register is done and waits then until the CPU reboots. There is also a ticket #17839 to this bug. https://dev.openwrt.org/ticket/17839 Signed-off-by: Michael Uray <michael.u...@ctb.co.at> --- --- a/arch/mips/ath79/common.c +++ b/arch/mips/ath79/common.c @@ -83,6 +83,8 @@ void ath79_device_reset_set(u32 mask) spin_lock_irqsave(&ath79_device_reset_lock, flags); t = ath79_reset_rr(reg); ath79_reset_wr(reg, t | mask); + if (mask == AR71XX_RESET_FULL_CHIP) + for (;;); spin_unlock_irqrestore(&ath79_device_reset_lock, flags); } EXPORT_SYMBOL_GPL(ath79_device_reset_set); -----Ursprüngliche Nachricht----- Von: Michael Uray Gesendet: Dienstag, 21. Oktober 2014 14:31 An: openwrt-devel@lists.openwrt.org Betreff: AW: [OpenWrt-Devel] [PATCH 1/1] [kernel] ar71xx: reset problem fix John, I have tried to use your recommended macro but it did not work. Please see comment #70 for details: https://dev.openwrt.org/ticket/17839#comment:70 The patch should be then fine so far as I can see, I just corrected the comments. Michael --- This patch fixes the reset bug on the ar71xx platform. The reboot command causes sometimes hanging routers with TL-WDR3600 (HW V1.5) and TL-WDR4300 (HW V1.7) platforms and probably also on other devices. Sometimes a reboot is successful, sometimes not and a power cycle of the device is required. This patch runs an endless loop when the mask for the FULL_CHIP_RESET gets set, the write to the reset register is done and waits then until the CPU reboots. There is also a ticket #17839 to this bug. https://dev.openwrt.org/ticket/17839 Signed-off-by: Michael Uray <michael.u...@ctb.co.at> --- --- a/arch/mips/ath79/common.c +++ b/arch/mips/ath79/common.c @@ -83,6 +83,8 @@ void ath79_device_reset_set(u32 mask) spin_lock_irqsave(&ath79_device_reset_lock, flags); t = ath79_reset_rr(reg); ath79_reset_wr(reg, t | mask); + if (mask == AR71XX_RESET_FULL_CHIP) + for (;;); spin_unlock_irqrestore(&ath79_device_reset_lock, flags); } EXPORT_SYMBOL_GPL(ath79_device_reset_set); -----Ursprüngliche Nachricht----- Von: openwrt-devel [mailto:openwrt-devel-boun...@lists.openwrt.org] Im Auftrag von John Crispin Gesendet: Samstag, 18. Oktober 2014 07:37 An: openwrt-devel@lists.openwrt.org Betreff: Re: [OpenWrt-Devel] [PATCH 1/1] [kernel] ar71xx: reset problem fix On 18/10/2014 00:10, Michael Uray wrote: > This patch fixes the reset bug on the ar71xx platform. > > The reboot command causes sometimes hanging routers with TL-WDR3600 (HW V1.5) > and TL-WDR4300 (HW V1.7) platforms and probably also on other devices. > > Sometimes a reboot is successful, sometimes not and a power cycle of the > device is required. > This patch runs an endless loop after the interrupts get disabled and the > FULL_CHIP_RESET gets set and waits then until the CPU reboots. Hi, the code does not set the FULL_CHIP_RESET but checks whether it is set. also please look at the unreachable() macro instead of using a endless loop John > > There is also a ticket #17839 to this bug. > https://dev.openwrt.org/ticket/17839 > > Signed-off-by: Michael Uray <michael.u...@ctb.co.at> > > I am not subscribed to the mailing list, so please put me on CC if you answer. > > --- > --- a/arch/mips/ath79/common.c > +++ b/arch/mips/ath79/common.c > @@ -83,6 +83,8 @@ void ath79_device_reset_set(u32 mask) > spin_lock_irqsave(&ath79_device_reset_lock, flags); > t = ath79_reset_rr(reg); > ath79_reset_wr(reg, t | mask); > + if (mask == AR71XX_RESET_FULL_CHIP) > + for (;;); > spin_unlock_irqrestore(&ath79_device_reset_lock, flags); } > EXPORT_SYMBOL_GPL(ath79_device_reset_set); > _______________________________________________ > openwrt-devel mailing list > openwrt-devel@lists.openwrt.org > https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel