Hi Christian,

Thank you for your review.

On 2022/03/28 4:48, Christian Lamparter wrote:
Hi,

On Sun, Mar 27, 2022 at 10:22 AM INAGAKI Hiroshi
<musashino.o...@gmail.com> wrote:
Sony NCP-HG100/Cellular is a IoT Gateway with 2.4/5 GHz band 11ac
(WiFi-5) wireless function, based on IPQ4019.

Specification:

- SoC                   : Qualcomm IPQ4019
- RAM                   : DDR3 512 MiB (H5TC4G63EFR)
- Flash                 : eMMC 4 GiB (THGBMNG5D1LBAIT)
- WLAN                  : 2.4/5 GHz 2T2R (IPQ4019)
- Ethernet              : 10/100/1000 Mbps x2
   - Transceiver         : Qualcomm QCA8072
- WWAN                  : Telit LN940A9
- Z-Wave                : Silicon Labs ZM5101
- Bluetooth             : Qualcomm CSR8811
- Audio DAC             : Realtek ALC5629
- Audio Amp.            : Realtek ALC1304
- Voice Input Processor : Conexant CX20924
- Micro Controller Unit : Nuvoton MINI54FDE
   - RGB LED, Fan, Temp. sensors
- Touch Sensor          : Cypress CY8C4014LQI
- RGB LED driver        : TI LP55231 (2x)
- LEDs/Keys             : 11x, 6x
- UART                  : through-hole on PCB
   - J1: 3.3V, TX, RX, GND from tri-angle marking
   - 115200n8
- Power                 : 12 VDC, 2.5 A

Flash instruction using initramfs image:

1. Prepare TFTP server with the IP address 192.168.132.100 and place the
    initramfs image to TFTP directory with the name "C0A88401.img"

2. Boot NCP-HG100/Cellular and interrupt after the message
    "Hit any key to stop autoboot:  2"

3. Perform the following commands and set bootcmd to allow booting from
    eMMC

    setenv bootcmd "mmc read 0x84000000 0x2e22 0x4000 && bootm 0x84000000"
    saveenv

4. Perform the following command to load/boot the OpenWrt initramfs image

    tftpboot && bootm

5. On the initramfs image, perform sysupgrade with the sysupgrade image
    (if needed, backup eMMC partitions by dd command and download to
    other place before performing sysupgrade)

6. Wait for ~120 seconds to complete flashing

Known issues:

- The primary uart is shared for debug console and Z-Wave chip. To use
   it for debug console on OpenWrt, Z-Wave chip cannot be used.

- There are no drivers for audio-related chips/functions in Linux Kernel
   and OpenWrt, they cannot be used.

- There is no driver for MINI54FDE Micro-Controller Unit, customized for
   this device by the firmware in the MCU. This chip controls the
   following functions, but they cannot be controlled in OpenWrt.

   - RGB LED
   - Fan
   - Thermal Sensors (2x)
Does the MCU do adequate thermal control even without input from the
kernel/userspace? Don't want to let it overheat.

It may be controlled automatically by default. However, so far I haven't done a rigorous test... I'll consider how to make sure.


- Currently, there is no driver or tool for CY8C4014LQI and cannot be
   controlled. It cannot be exited from "booting mode" and moved to "normal
   op mode" after booting. And also, the 4x buttons (mic mute, vol down,
   vol up, alexa trigger) connected to the IC cannot be controlled.

   - it can be exited from "booting mode" by installing and executing
     i2cset command:

     opkg update
     opkg install i2c-tools
     i2cset -y 1 0x14 0xf 1

- There is a connection issue on the control by uqmi for the WWAN module.
   But modemmanager can be used without any issues and the use of it is
   recommended.

- With the F2FS format, too many errors are reported on erasing eMMC
   partition "rootfs_data" while booting:

   [    1.360270] sdhci: Secure Digital Host Controller Interface driver
   [    1.363636] sdhci: Copyright(c) Pierre Ossman
   [    1.369730] sdhci-pltfm: SDHCI platform and OF driver helper
   [    1.374729] sdhci_msm 7824900.sdhci: Got CD GPIO
   ...
   [    1.413552] mmc0: SDHCI controller on 7824900.sdhci [7824900.sdhci] using 
ADMA 64-bit
   [    1.528325] mmc0: new HS200 MMC card at address 0001
   [    1.530627] mmcblk0: mmc0:0001 004GA0 3.69 GiB
   [    1.533530] mmcblk0boot0: mmc0:0001 004GA0 partition 1 2.00 MiB
   [    1.537831] mmcblk0boot1: mmc0:0001 004GA0 partition 2 2.00 MiB
   [    1.542918] mmcblk0rpmb: mmc0:0001 004GA0 partition 3 512 KiB, chardev 
(247:0)
   [    1.550323] Alternate GPT is invalid, using primary GPT.
   [    1.561669]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 
p16 p17
   ...
   [    8.841400] mount_root: loading kmods from internal overlay
   [    8.860241] kmodloader: loading kernel modules from //etc/modules-boot.d/*
   [    8.863746] kmodloader: done loading kernel modules from 
//etc/modules-boot.d/*
   [    9.240465] block: attempting to load /etc/config/fstab
   [    9.246722] block: unable to load configuration (fstab: Entry not found)
   [    9.246863] block: no usable configuration
   [    9.254883] mount_root: overlay filesystem in /dev/mmcblk0p17 has not 
been formatted yet
   [    9.438915] urandom_read: 5 callbacks suppressed
   [    9.438924] random: mkfs.f2fs: uninitialized urandom read (16 bytes read)
   [   12.243332] mmc_erase: erase error -110, status 0x800
   [   12.246638] mmc0: cache flush error -110
   [   15.134585] mmc_erase: erase error -110, status 0x800
   [   15.135891] mmc_erase: group start error -110, status 0x0
   [   15.139850] mmc_erase: group start error -110, status 0x0
   ...(too many the same errors)...
Not sure, but won't there be problems with ext4 as well? Wouldn't the
same errors happens
on ext4 as well, if it wasn't for lazy_init? And could ext4 survive a
full read/write sweep too,
without it causing the same errors?

At least, I didn't see any errors when booting with ext4. It's very strange...

log (ext4):
[    2.671202] sdhci: Secure Digital Host Controller Interface driver
[    2.674430] sdhci: Copyright(c) Pierre Ossman
[    2.680571] sdhci-pltfm: SDHCI platform and OF driver helper
[    2.685520] sdhci_msm 7824900.sdhci: Got CD GPIO
[    2.723830] genirq: irq_chip msmgpio did not update eff. affinity mask of irq 104 [    2.724138] mmc0: SDHCI controller on 7824900.sdhci [7824900.sdhci] using ADMA 64-bit
...
[    2.826977] mmc0: new HS200 MMC card at address 0001
[    2.831336] mmcblk0: mmc0:0001 004GA0 3.69 GiB
[    2.835330] mmcblk0boot0: mmc0:0001 004GA0 partition 1 2.00 MiB
[    2.839635] mmcblk0boot1: mmc0:0001 004GA0 partition 2 2.00 MiB
[    2.844666] mmcblk0rpmb: mmc0:0001 004GA0 partition 3 512 KiB, chardev (247:0)
[    2.852521] Alternate GPT is invalid, using primary GPT.
[    2.857461]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17
...
[    2.939922] VFS: Mounted root (squashfs filesystem) readonly on device 259:7.
...
[   10.197698] mount_root: loading kmods from internal overlay
[   10.224308] kmodloader: loading kernel modules from //etc/modules-boot.d/* [   10.227518] kmodloader: done loading kernel modules from //etc/modules-boot.d/*
[   10.494516] block: attempting to load /etc/config/fstab
[   10.501438] block: unable to load configuration (fstab: Entry not found)
[   10.501675] block: no usable configuration
[   10.516162] EXT4-fs (mmcblk0p17): mounted filesystem with ordered data mode. Opts: (null)
[   10.670977] block: attempting to load /etc/config/fstab
[   10.671257] block: unable to load configuration (fstab: Entry not found)
[   10.675167] block: no usable configuration
[   10.684076] mount_root: overlay filesystem has not been fully initialized yet
[   10.688743] mount_root: switching to ext4 overlay

And I tested read/write with ext4, there is no problem.

log:
root@OpenWrt:/# mount
/dev/root on /rom type squashfs (ro,relatime)
proc on /proc type proc (rw,nosuid,nodev,noexec,noatime)
sysfs on /sys type sysfs (rw,nosuid,nodev,noexec,noatime)
cgroup2 on /sys/fs/cgroup type cgroup2 (rw,nosuid,nodev,noexec,relatime,nsdelegate)
tmpfs on /tmp type tmpfs (rw,nosuid,nodev,noatime)
/dev/mmcblk0p17 on /overlay type ext4 (rw,noatime)
overlayfs:/overlay on / type overlay (rw,noatime,lowerdir=/,upperdir=/overlay/upper,workdir=/overlay/work)
tmpfs on /dev type tmpfs (rw,nosuid,noexec,noatime,size=512k,mode=755)
devpts on /dev/pts type devpts (rw,nosuid,noexec,noatime,mode=600,ptmxmode=000)
debugfs on /sys/kernel/debug type debugfs (rw,noatime)
none on /sys/fs/bpf type bpf (rw,nosuid,nodev,noexec,noatime,mode=700)
root@OpenWrt:/# lsblk
NAME         MAJ:MIN RM  SIZE RO TYPE MOUNTPOINTS
mmcblk0      179:0    0  3.7G  0 disk
├─mmcblk0p1  179:1    0  512K  0 part
├─mmcblk0p2  179:2    0  512K  0 part
├─mmcblk0p3  179:3    0  512K  0 part
├─mmcblk0p4  179:4    0  512K  0 part
├─mmcblk0p5  179:5    0  256K  0 part
├─mmcblk0p6  179:6    0  256K  0 part
├─mmcblk0p7  179:7    0  512K  0 part
├─mmcblk0p8  259:0    0  256K  0 part
├─mmcblk0p9  259:1    0    1M  0 part
├─mmcblk0p10 259:2    0    1M  0 part
├─mmcblk0p11 259:3    0  256K  0 part
├─mmcblk0p12 259:4    0  256K  0 part
├─mmcblk0p13 259:5    0    8M  0 part
├─mmcblk0p14 259:6    0    8M  0 part
├─mmcblk0p15 259:7    0  128M  0 part /rom
├─mmcblk0p16 259:8    0  128M  0 part
└─mmcblk0p17 259:9    0  1.6G  0 part /overlay
mmcblk0boot0 179:8    0    2M  1 disk
mmcblk0boot1 179:16   0    2M  1 disk
root@OpenWrt:/# dd if=/dev/zero of=/overlay/zero.bin iflag=count_bytes count=1G
2097152+0 records in
2097152+0 records out
root@OpenWrt:/# dd if=/overlay/zero.bin of=/dev/null
2097152+0 records in
2097152+0 records out


[    1.528325] mmc0: new HS200 MMC card at address 0001
The device seems to have a name-brand eMMC, still you could try a lower speed?
This should be possible through changinge the dts:

max-frequency = <50000000>;

as per:
<https://www.kernel.org/doc/Documentation/devicetree/bindings/mmc/mmc-controller.yaml>
(technically, sdhci-msm.txt's binding doesn't mention it, but it pulls
from the mmc core,
so this setting/binding should be present)

Oh, I didn't know it. I'll try...


   [   17.350811] mmc_erase: group start error -110, status 0x0
   [   17.356197] mmc_erase: group start error -110, status 0x0
   [   17.439498] sdhci_msm 7824900.sdhci: Card stuck in wrong state! 
card_busy_detect status: 0xe00
   [   17.446910] mmc0: tuning execution failed: -5
   [   17.447111] mmc0: cache flush error -110
   [   18.012440] F2FS-fs (mmcblk0p17): Found nat_bits in checkpoint
   [   18.062652] F2FS-fs (mmcblk0p17): Mounted with checkpoint version = 
428fa16b
   [   18.198691] block: attempting to load /etc/config/fstab
   [   18.198972] block: unable to load configuration (fstab: Entry not found)
   [   18.203029] block: no usable configuration
   [   18.211371] mount_root: overlay filesystem has not been fully initialized 
yet
   [   18.214487] mount_root: switching to f2fs overlay

   So, this support uses ext4 format instead which has no errors.

Note:

- NCP-HG100/Cellular has 2x os-image pairs in eMMC.

   - 0:HLOS, rootfs
   - 0:HLOS_1, rootfs_1

   In OpenWrt, the first image pair is used.

- "bootipq" command in U-Boot requires authentication with signed-image
   by default. To boot unsigned image of OpenWrt, use "mmc read" and
   "bootm" command instead.

- This support is for "Cellular" variant of NCP-HG100 and not tested on
   "WLAN" (non-cellular) variant.

- The board files of ipq-wifi may also be used in "WLAN" variant of
   NCP-HG100, but unconfirmed and add files as for "Cellular" variant.

- "NET" LED is used to indicate WWAN status in stock firmware.

- There is no MAC address information in the label on the case, use the
   address included in UUID in the label as "label-MAC" instead.

- The "CLOUD" LEDs are partially used for indication of system status in
   stock firmware, use they as status LEDs in OpenWrt instead of RGB LED
   connected to the MCU.

MAC addresses:

LAN     : 5C:FF:35:**:**:ED (ART, 0x6    (hex))
WAN     : 5C:FF:35:**:**:EF (ART, 0x0    (hex))
2.4 GHz : 5C:FF:35:**:**:ED (ART, 0x1006 (hex))
5 GHz   : 5C:FF:35:**:**:EE (ART, 0x5006 (hex))

partition layout in eMMC (by fdisk, GPT):

Disk /dev/mmcblk0: 7733248 sectors, 3776M
Logical sector size: 512
Disk identifier (GUID): ****
Partition table holds up to 20 entries
First usable sector is 34, last usable sector is 7634910

Number  Start (sector)    End (sector)  Size Name
      1              34            1057  512K 0:SBL1
      2            1058            2081  512K 0:BOOTCONFIG
      3            2082            3105  512K 0:QSEE
      4            3106            4129  512K 0:QSEE_1
      5            4130            4641  256K 0:CDT
      6            4642            5153  256K 0:CDT_1
      7            5154            6177  512K 0:BOOTCONFIG1
      8            6178            6689  256K 0:APPSBLENV
      9            6690            8737 1024K 0:APPSBL
     10            8738           10785 1024K 0:APPSBL_1
     11           10786           11297  256K 0:ART
     12           11298           11809  256K 0:HSEE
     13           11810           28193 8192K 0:HLOS
     14           28194           44577 8192K 0:HLOS_1
     15           44578          306721  128M rootfs
     16          306722          568865  128M rootfs_1
     17          568866         3958065 1654M rootfs_data

[initial work]
Signed-off-by: Iwao Yuki <dev.c...@gmail.com>
Co-developed-by: Iwao Yuki <dev.c...@gmail.com>
[adjustments, cleanups, commit message, sending patch]
Signed-off-by: INAGAKI Hiroshi <musashino.o...@gmail.com>
---
This is a continuation of the PR #4001[1] in GitHub.
The drivers for MCU are still missing and need to be controlled via
i2cset command.

[1]: https://github.com/openwrt/openwrt/pull/4001


diff --git a/package/firmware/ipq-wifi/Makefile 
b/package/firmware/ipq-wifi/Makefile
index b3b04c6abf..372f2ba58a 100644
--- a/package/firmware/ipq-wifi/Makefile
+++ b/package/firmware/ipq-wifi/Makefile
@@ -57,6 +57,7 @@ ALLWIFIBOARDS:= \
         plasmacloud_pa2200 \
         qxwlan_e2600ac-c1 \
         qxwlan_e2600ac-c2 \
+       sony_ncp-hg100-cellular \
         teltonika_rutx \
         zte_mf286d

@@ -151,6 +152,7 @@ $(eval $(call 
generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
  $(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud 
PA2200))
  $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c1,Qxwlan E2600AC C1))
  $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c2,Qxwlan E2600AC C2))
+$(eval $(call generate-ipq-wifi-package,sony_ncp-hg100-cellular,Sony 
NCP-HG100/Cellular))
Have you posted the boardfiles to ath10k too?

If not, please follow these instructions:
https://wireless.wiki.kernel.org/en/users/drivers/ath10k/boardfiles
(you can use a template, just plug in the boardfile and change the names)
[...]

Oops, I haven't sent... I'll do.


--- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
@@ -91,6 +91,11 @@ qxwlan,e2600ac-c2)
         ucidef_set_led_wlan "wlan2g" "WLAN0" "green:wlan0" "phy0tpt"
         ucidef_set_led_wlan "wlan5g" "WLAN1" "green:wlan1" "phy1tpt"
         ;;
+sony,ncp-hg100-cellular)
+       ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0"
+       ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
+       ucidef_set_led_netdev "wwan" "WWAN" "green:net" "wwan0"
net... hmm. There's no LED_FUNCTION_WWAN or LED_FUNCTION_LTE/4G function
in linux/include/dt-bindings/leds/common.h though.

OK, I'll keep in mind.


+       ;;
  zyxel,nbg6617 |\
  zyxel,wre6606)
         ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wlan2g" "phy0tpt"
[...]
diff --git 
a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts
 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts
new file mode 100644
index 0000000000..13859d1da7
--- /dev/null
+++ 
b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-ncp-hg100-cellular.dts
@@ -0,0 +1,635 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+
+#include "qcom-ipq4019.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       model = "Sony NCP-HG100/Cellular";
+       compatible = "sony,ncp-hg100-cellular", "qcom,ipq4019";
that "qcom,ipq4019", do you need it because of the uboot? or can you drop it?

Indeed, I recognized it as necessary, but it doesn't seem to be required. I'll drop in the next patch version.


+
+       aliases {
+               led-boot = &led_cloud_green;
+               led-failsafe = &led_cloud_red;
+               led-running = &led_cloud_green;
+               led-upgrade = &led_cloud_green;
+               label-mac-device = &gmac0;
+       };
+
+       chosen {
+               bootargs = "console=ttyMSM0,115200n8 root=/dev/mmcblk0p15 
rootfstype=squashfs,ext4 clk_ignore_unused";
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x20000000>;
oh, just noticed it. This is one of those elusive 512 MiB devices.

+       };
+
+       soc {
+               tcsr@1949000 {
+                       status = "okay";
+                       compatible = "qcom,tcsr";
+                       reg = <0x1949000 0x100>;
+                       qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+               };
+
+               tcsr@194b000 {
+                       status = "okay";
+                       compatible = "qcom,tcsr";
+                       reg = <0x194b000 0x100>;
+                       qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+               };
+
+               ess_tcsr@1953000 {
+                       status = "okay";
+                       compatible = "qcom,tcsr";
+                       reg = <0x1953000 0x1000>;
+                       qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+               };
+
+               tcsr@1957000 {
+                       status = "okay";
+                       compatible = "qcom,tcsr";
+                       reg = <0x1957000 0x100>;
+                       qcom,wifi_noc_memtype_m0_m2 = 
<TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+               };
+
+               ess-psgmii@98000 {
+                       status = "okay";
+               };
+
+               dma@7984000 {
+                       status = "okay";
+               };
+
+               ess-switch@c000000 {
+                       status = "okay";
+                       switch_mac_mode = <0x0>; /* mac mode for RGMII RMII */
+                       switch_initvlas = <0x0007c 0x54>; /* PORT0_STATUS */
+               };
+
+               edma@c080000 {
+                       status = "okay";
+               };
+       };
+
+       keys-repeat {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&keys_pins>;
+               pinctrl-names = "default";
+               autorepeat;
+
so these are the buttons that don't work? You mentioned above that they are
connected to the IC (MCU)?. Does this mean that they start working when the
MCU has booted (through issuing the i2cset commands above)?

Confirmed, yes. To use those keys, the touch sensor on 0x14(not MCU on 0x15) need to be exited from the "booting mode" by i2cset or something.



+               volup {
+                       label = "volume up";
+                       linux,code = <KEY_VOLUMEUP>;
+                       gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
+                       linux,input-type = <EV_KEY>;
+               };
+
+               voldown {
+                       label = "volume down";
+                       linux,code = <KEY_VOLUMEDOWN>;
+                       gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+                       linux,input-type = <EV_KEY>;
+               };
+
+               alexatrigger {
+                       label = "alexa trigger";
+                       linux,code = <BTN_0>;
+                       gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+                       linux,input-type = <EV_KEY>;
+               };
+
+               mute {
+                       label = "mic mute";
+                       linux,code = <BTN_1>;
+                       gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
+                       linux,input-type = <EV_SW>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               reset {
+                       label = "reset";
+                       gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "setup";
+                       gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+
+};
+
+&tlmm {
+       pinctrl-0 = <&uart0_ctrl_pins>, <&bt_pins>,
+                   <&aud_pins>, <&mcu_pins>;
+       pinctrl-names = "default";
+
+       /*
+        * uart0 is shared for debug console and Z-Wave,
+        * use only for debug console in OpenWrt.
+        *
+        * 1: debug console
+        * 0: Z-Wave
+        */
in theory, you could add some of those gpio mux to
base-files/etc/board.d/03_gpio_switches
this way, they can be set through uci.

Wow, indeed and sounds great. I'll try...


+       uart0_ctrl_pins: uart0_ctrl_pinmux {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       output-high;
+               };
+       };
+
+       serial_pins: serial_pinmux {
+               mux {
+                       pins = "gpio16", "gpio17";
+                       function = "blsp_uart0";
+                       bias-disable;
+               };
+       };
+
+       /*
+        * reset pin for Z-Wave
+        * active-low, >= 20ns
+        */
+       zwave_pins: zwave_pinmux {
+               mux {
+                       pins = "gpio59";
+                       function = "gpio";
+                       output-high;
+               };
+       };
+
+       serial_1_pins: serial1_pinmux {
+               mux {
+                       pins = "gpio8", "gpio9",
+                               "gpio10", "gpio11";
+                       function = "blsp_uart1";
+                       bias-disable;
+               };
+       };
+
+       bt_pins: bt_pinmux {
+               mux_reset {
+                       pins = "gpio66";
+                       function = "gpio";
+                       output-high;
+               };
+
+               mux_pwr {
+                       pins = "gpio68";
+                       function = "gpio";
+                       output-high;
+               };
+       };
+
+       mdio_pins: mdio_pinmux {
+               mux_1 {
+                       pins = "gpio6";
+                       function = "mdio";
+                       bias-pull-up;
+               };
+
+               mux_2 {
+                       pins = "gpio7";
+                       function = "mdc";
+                       bias-pull-up;
+               };
+       };
+
+       i2c_1_pins: i2c_1_pinmux {
+               mux {
+                       pins = "gpio12", "gpio13";
+                       function = "blsp_i2c1";
+                       bias-disable;
+               };
+       };
+
+       keys_pins: keys_pinmux {
+               mux_1 {
+                       pins = "gpio39", "gpio40", "gpio42", "gpio47";
+                       function = "gpio";
+                       bias-disable;
+               };
+
+               mux_2 {
+                       pins = "gpio2";
+                       function = "gpio";
+                       input;
+               };
+       };
+
+       sd_pins: sd_pins {
+               mux {
+                       function = "sdio";
+                       pins = "gpio23", "gpio24", "gpio25", "gpio26",
+                               "gpio28", "gpio29", "gpio30", "gpio31";
+                       drive-strength = <4>;
+               };
+
+               mux_sd_clk {
+                       function = "sdio";
+                       pins = "gpio27";
+                       drive-strength = <16>;
+               };
+
+               mux_sd7 {
+                       function = "sdio";
+                       pins = "gpio32";
+                       drive-strength = <4>;
+                       bias-disable;
+               };
+       };
+
+       aud_pins: aud_pinmux {
+               mux {
+                       pins = "gpio48", "gpio49", "gpio50", "gpio51";
+                       function = "aud_pin";
+               };
+       };
+
+       alc1304_pins: alc1304_pinmux {
+               mux_1 {
+                       pins = "gpio44";
+                       function = "gpio";
+                       bias-disable;
+               };
+
+               mux_2 {
+                       pins = "gpio45";
+                       function = "gpio";
+                       bias-disable;
+               };
+       };
+
+       cx2902x_reset: cx2902x_pinmux {
+               mux_1 {
+                       pins = "gpio64";
+                       function = "gpio";
+                       bias-disable;
+               };
+
+               mux_2 {
+                       pins = "gpio65";
+                       function = "gpio";
+                       bias-disable;
+               };
+       };
+
+       lte_pins: lte_pinmux {
+               mux_en {
+                       pins = "gpio20";
+                       function = "gpio";
+                       output-high;
+               };
+
+               mux_reset {
+                       pins = "gpio35";
+                       function = "gpio";
+                       input;
+               };
+       };
+
+       usb3_pins: usb3_pinmux {
+               mux_en {
+                       pins = "gpio36";
+                       function = "gpio";
+                       output-high;
+               };
+
+               mux_flt {
+                       pins = "gpio4";
+                       function = "gpio";
+                       input;
+               };
+       };
+
+       mcu_pins: mcu_pinmux {
+               mux_boot {
+                       pins = "gpio38";
+                       function = "gpio";
+                       output-low;
+               };
+
+               mux_reset {
+                       pins = "gpio5";
+                       function = "gpio";
+                       output-high;
+               };
+       };
+};
+
+&blsp_dma {
+       status = "okay";
+};
+
+&blsp1_i2c4 {
+       /*
+        * There is no driver for the following devices:
+        * - CY8C4014LQI@14     : Touch-Sensor for buttons on top
+        * - MINI54FDE@15       : MCU for Fan/RGB LED/Thermal control
+        * - ALC5629@18         : I2S/PCM Audio DAC
+        * - CX20924@41         : Voice Input Processor
+        */
+       pinctrl-0 = <&i2c_1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       led-controller@32 {
+               compatible = "ti,lp55231";
+               reg = <0x32>;
+               clock-mode = /bits/ 8 <0>;
+               enable-gpio = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               led@0 {
+                       chan-name = "green:wan";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x0>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_WAN;
+                       function-enumerator = <1>;
+               };
+
+               led@1 {
+                       chan-name = "blue:wan";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x1>;
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_WAN;
+                       function-enumerator = <2>;
+               };
+
+               led@2 {
+                       chan-name = "green:lan";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x2>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_LAN;
+                       function-enumerator = <1>;
+               };
+
+               led@3 {
+                       chan-name = "blue:lan";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x3>;
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_LAN;
+                       function-enumerator = <2>;
+               };
+
+               led@4 {
+                       chan-name = "green:wlan2g";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x4>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <1>;
+                       linux,default-trigger = "phy0tpt";
+               };
+
+               led@5 {
+                       chan-name = "blue:wlan2g";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x5>;
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <2>;
+               };
+
+               led@6 {
+                       chan-name = "red:wan";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x6>;
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_WAN;
+                       function-enumerator = <3>;
+               };
+
+               led@7 {
+                       chan-name = "red:lan";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x7>;
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_LAN;
+                       function-enumerator = <3>;
+               };
+
+               led@8 {
+                       chan-name = "red:wlan2g";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x8>;
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <3>;
+               };
+       };
+
+       led-controller@33 {
+               compatible = "ti,lp55231";
+               reg = <0x33>;
+               clock-mode = /bits/ 8 <0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               led@0 {
+                       chan-name = "green:wlan5g";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x0>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <4>;
+                       linux,default-trigger = "phy1tpt";
+               };
+
+               led@1 {
+                       chan-name = "blue:wlan5g";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x1>;
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <5>;
+               };
+
+               led@2 {
+                       chan-name = "green:net";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x2>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <6>;
+               };
+
+               led@3 {
+                       chan-name = "blue:net";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x3>;
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <7>;
+               };
+
+               led_cloud_green: led@4 {
+                       chan-name = "green:cloud";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x4>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+                       function-enumerator = <1>;
+               };
+
+               led@5 {
+                       chan-name = "blue:cloud";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x5>;
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_STATUS;
+                       function-enumerator = <2>;
+               };
+
+               led@6 {
+                       chan-name = "red:wlan5g";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x6>;
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <8>;
+               };
+
+               led@7 {
+                       chan-name = "red:net";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x7>;
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_WLAN;
+                       function-enumerator = <9>;
+               };
+
+               led_cloud_red: led@8 {
+                       chan-name = "red:cloud";
+                       led-cur = /bits/ 8 <50>;
+                       max-cur = /bits/ 8 <100>;
+                       reg = <0x8>;
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_STATUS;
+                       function-enumerator = <3>;
+               };
+       };
+};
+
+&blsp1_uart1 {
+       pinctrl-0 = <&serial_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&blsp1_uart2 {
+       pinctrl-0 = <&serial_1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&crypto {
+       status = "okay";
+};
+
+&cryptobam {
+       status = "okay";
+};
+
+&mdio {
+       status = "okay";
+       pinctrl-0 = <&mdio_pins>;
+       pinctrl-names = "default";
+       reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
+};
+
+&prng {
+       status = "okay";
+};
+
+&vqmmc {
+       status = "okay";
+};
+
+&sdhci {
+       status = "okay";
+       pinctrl-0 = <&sd_pins>;
+       pinctrl-names = "default";
+       cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
+       vqmmc-supply = <&vqmmc>;
+};
+
+&usb2 {
+       status = "okay";
+};
+
+&usb2_hs_phy {
+       status = "okay";
+};
+
+&usb3 {
+       status = "okay";
+
+       pinctrl-0 = <&usb3_pins>, <&lte_pins>;
+       pinctrl-names = "default";
+
+       dwc3@8a00000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               device@1 {
this is the internal LTE-Modem right?

Yes, it's a Telit LN940A9 LTE module on M.2 slot.


+                       compatible = "usb1bc7,1900";
+                       reg = <1>;
+               };
+       };
+};
+
+&usb3_hs_phy {
+       status = "okay";
+};
+
+&usb3_ss_phy {
+       status = "okay";
+};
+
+&wifi0 {
+       status = "okay";
+       qcom,ath10k-calibration-variant = "Sony-NCP-HG100-Cellular";
+};
+
+&wifi1 {
+       status = "okay";
+       qcom,ath10k-calibration-variant = "Sony-NCP-HG100-Cellular";
+};
+
+&watchdog {
+       status = "okay";
+};
diff --git a/target/linux/ipq40xx/image/generic.mk 
b/target/linux/ipq40xx/image/generic.mk
index 33c6def373..1e97743b2e 100644
--- a/target/linux/ipq40xx/image/generic.mk
+++ b/target/linux/ipq40xx/image/generic.mk
@@ -949,6 +949,19 @@ define Device/qxwlan_e2600ac-c2
  endef
  TARGET_DEVICES += qxwlan_e2600ac-c2

+define Device/sony_ncp-hg100-cellular
+       $(call Device/FitImage)
+       DEVICE_VENDOR := Sony
+       DEVICE_MODEL := NCP-HG100/Cellular
+       DEVICE_DTS_CONFIG := config@ap.dk04.1-c4
+       SOC := qcom-ipq4019
+       KERNEL_SIZE := 8192k
That 8192K is plenty of space for gzip-kernel.

Can you please test, if the uboot supports LZMA-packed fit images or not?

OK, I'll test it.


+       IMAGE_SIZE := 128m
+       DEVICE_PACKAGES := e2fsprogs ipq-wifi-sony_ncp-hg100-cellular \
+               kmod-fs-ext4 uqmi
+endef
+TARGET_DEVICES += sony_ncp-hg100-cellular
+
Cheers,
Christian

Regards,
Hiroshi


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