--- Begin Message ---
Hi All.
I am attempting to send through two patches for adding
support for the JG926A.
The JG925A (180W model) should be very similar but I don't have
a device to test. I can get the H3C device ID and add it to
the patch set but it would be untested on physical hardware.
I understand there's also work going on for getting the target
onto linux kernel 6.6?
I have two patches prepared with git format-patch attached.
I can also email through as separate emails if required?
Your feedback would be appreciated.
Cheers,
Evan.
From b213b9c85f7195c9ed46fd47bb96089c17d5c2f3 Mon Sep 17 00:00:00 2001
From: Evan Jobling <evan.jobl...@mslsc.com.au>
Date: Sat, 14 Sep 2024 02:43:35 +0000
Subject: [PATCH 2/2] realtek: add support for HPE 1920-24G-PoE-370w
Hardware information:
---------------------
The HPE 1920-24G-PoE+ (370W) (JG926A) is a switch that is
part of the 1920 family wich 370W nominal PoE+ support.
Common with HPE 1920-24G:
- RTL8382 SoC
- 24 Gigabit RJ45 ports (built-in RTL8218B, 2 external RTL8218D)
- 4 SFP ports (external RTL8214FC)
- RJ45 RS232 port on front panel
- 32 MiB NOR Flash
- 128 MiB DDR3 DRAM
- PT7A7514 watchdog
HPE 1920-24G-PoE+ (370W):
- PoE chip
- 3 fans (40mm)
Known issues:
---------------------
- PoE LEDs are uncontrolled.
(Manual taken from f2f09bc)
Booting initramfs image:
------------------------
- Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
connect the server to a switch port.
- Connect to the console port of the device and enter the extended
boot menu by typing Ctrl+B when prompted.
- Choose the menu option "<3> Enter Ethernet SubMenu".
- Set network parameters via the option "<5> Modify Ethernet Parameter".
Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
can be left blank, it is not required for booting from RAM). Note that
the configuration is saved on flash, so it only needs to be done once.
- Select "<1> Download Application Program To SDRAM And Run".
Initial installation:
---------------------
- Boot an initramfs image as described above, then use sysupgrade to
install OpenWrt permanently. After initial installation, the
bootloader needs to be configured to load the correct image file
- Enter the extended boot menu again and choose "<4> File Control",
then select "<2> Set Application File type".
- Enter the number of the file "openwrt-kernel.bin" (should be 1), and
use the option "<1> +Main" to select it as boot image.
- Choose "<0> Exit To Main Menu" and then "<1> Boot System".
NOTE: The bootloader on these devices can only boot from the VFS
filesystem which normally spans most of the flash. With OpenWrt, only
the first part of the firmware partition contains a valid filesystem,
the rest is used for rootfs. As the bootloader does not know about this,
you must not do any file operations in the bootloader, as this may
corrupt the OpenWrt installation (selecting the boot image is an
exception, as it only stores a flag in the bootloader data, but doesn't
write to the filesystem).
Example PoE config file (/etc/config/poe):
---------------------
config global
option budget '370'
config port
option enable '1'
option id '1'
option name 'lan8'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '2'
option name 'lan7'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '3'
option name 'lan6'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '4'
option name 'lan5'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '5'
option name 'lan4'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '6'
option name 'lan3'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '7'
option name 'lan2'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '8'
option name 'lan1'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '9'
option name 'lan16'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '10'
option name 'lan15'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '11'
option name 'lan14'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '12'
option name 'lan13'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '13'
option name 'lan12'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '14'
option name 'lan11'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '15'
option name 'lan10'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '16'
option name 'lan9'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '17'
option name 'lan24'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '18'
option name 'lan23'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '19'
option name 'lan22'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '20'
option name 'lan21'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '21'
option name 'lan20'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '22'
option name 'lan19'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '23'
option name 'lan18'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '24'
option name 'lan17'
option poe_plus '1'
option priority '2'
Signed-off-by: Evan Jobling <evan.jobl...@mslsc.com.au>
---
.../linux/realtek/base-files/etc/board.d/02_network | 6 +++++-
.../realtek/base-files/etc/board.d/03_gpio_switches | 3 ++-
.../dts-5.15/rtl8382_hpe_1920-24g-poe-370w.dts | 12 ++++++++++++
target/linux/realtek/image/rtl838x.mk | 9 +++++++++
4 files changed, 28 insertions(+), 2 deletions(-)
create mode 100644 target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g-poe-370w.dts
diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network
index 35c79cffa2..2dd99d502e 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -35,7 +35,8 @@ hpe,1920-8g|\
hpe,1920-8g-poe-65w|\
hpe,1920-8g-poe-180w|\
hpe,1920-16g|\
-hpe,1920-24g)
+hpe,1920-24g|\
+hpe,1920-24g-poe-370w)
label_mac=$(mtd_get_mac_binary factory 0x68)
lan_mac=$label_mac
mac_count1=$(hexdump -v -n 4 -s 0x110 -e '4 "%d"' $(find_mtd_part factory) 2>/dev/null)
@@ -89,6 +90,9 @@ hpe,1920-8g-poe-65w)
hpe,1920-8g-poe-180w)
ucidef_set_poe 180 "$(filter_port_list_reverse "$lan_list" "lan9 lan10")"
;;
+hpe,1920-24g-poe-370w)
+ ucidef_set_poe 370 "$(filter_port_list_reverse "$lan_list" "lan25 lan26 lan27 lan28")"
+ ;;
netgear,gs110tpp-v1)
ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")"
;;
diff --git a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
index 1e49d89c64..684d7f795e 100644
--- a/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
+++ b/target/linux/realtek/base-files/etc/board.d/03_gpio_switches
@@ -6,7 +6,8 @@ board_config_update
board=$(board_name)
case "$board" in
-hpe,1920-8g-poe-180w)
+hpe,1920-8g-poe-180w|\
+hpe,1920-24g-poe-370w)
ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
;;
esac
diff --git a/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g-poe-370w.dts b/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g-poe-370w.dts
new file mode 100644
index 0000000000..88427a45e1
--- /dev/null
+++ b/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g-poe-370w.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl8382_hpe_1920-24g.dtsi"
+
+/ {
+ compatible = "hpe,1920-24g-poe-370w", "realtek,rtl838x-soc";
+ model = "HPE 1920-24G-PoE+ 370W (JG926A)";
+};
+
+&uart1 {
+ status = "okay";
+};
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 05574e5375..eff7eab0df 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -135,6 +135,15 @@ define Device/hpe_1920-24g
endef
TARGET_DEVICES += hpe_1920-24g
+define Device/hpe_1920-24g-poe-370w
+ $(Device/hpe_1920)
+ SOC := rtl8382
+ DEVICE_MODEL := 1920-24G-PoE+ 370W (JG926A)
+ DEVICE_PACKAGES += realtek-poe
+ H3C_DEVICE_ID := 0x00010029
+endef
+TARGET_DEVICES += hpe_1920-24g-poe-370w
+
define Device/inaba_aml2-17gp
SOC := rtl8382
IMAGE_SIZE := 13504k
--
2.39.2
From d7b3c1209a2db143e6f4ece32d82e5d80af64d0e Mon Sep 17 00:00:00 2001
From: Evan Jobling <evan.jobl...@mslsc.com.au>
Date: Sat, 14 Sep 2024 02:31:09 +0000
Subject: [PATCH 1/2] realtek: rtl838x: refactor hpe_1920-24g dts
The HPE JG924A, JG925A and JG926A share the same base.
Prepare base device for adding the PoE enabled switch support.
Signed-off-by: Evan Jobling <evan.jobl...@mslsc.com.au>
---
.../realtek/dts-5.15/rtl8382_hpe_1920-24g.dts | 62 +----------------
.../dts-5.15/rtl8382_hpe_1920-24g.dtsi | 68 +++++++++++++++++++
2 files changed, 69 insertions(+), 61 deletions(-)
create mode 100644 target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dtsi
diff --git a/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dts b/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dts
index 61781c708e..cc92b144b5 100644
--- a/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dts
+++ b/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dts
@@ -1,68 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "rtl8382_hpe_1920.dtsi"
+#include "rtl8382_hpe_1920-24g.dtsi"
/ {
compatible = "hpe,1920-24g", "realtek,rtl838x-soc";
model = "HPE 1920-24G (JG924A)";
};
-
-&mdio {
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-};
-
-&switch0 {
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
-
- SWITCH_PORT(8, 9, internal)
- SWITCH_PORT(9, 10, internal)
- SWITCH_PORT(10, 11, internal)
- SWITCH_PORT(11, 12, internal)
- SWITCH_PORT(12, 13, internal)
- SWITCH_PORT(13, 14, internal)
- SWITCH_PORT(14, 15, internal)
- SWITCH_PORT(15, 16, internal)
-
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
-
- SWITCH_PORT(24, 25, qsgmii)
- SWITCH_PORT(25, 26, qsgmii)
- SWITCH_PORT(26, 27, qsgmii)
- SWITCH_PORT(27, 28, qsgmii)
-
- port@28 {
- ethernet = <ðernet0>;
- reg = <28>;
- phy-mode = "internal";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
-};
diff --git a/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dtsi b/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dtsi
new file mode 100644
index 0000000000..61781c708e
--- /dev/null
+++ b/target/linux/realtek/dts-5.15/rtl8382_hpe_1920-24g.dtsi
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl8382_hpe_1920.dtsi"
+
+/ {
+ compatible = "hpe,1920-24g", "realtek,rtl838x-soc";
+ model = "HPE 1920-24G (JG924A)";
+};
+
+&mdio {
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+};
+
+&switch0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ SWITCH_PORT(0, 1, qsgmii)
+ SWITCH_PORT(1, 2, qsgmii)
+ SWITCH_PORT(2, 3, qsgmii)
+ SWITCH_PORT(3, 4, qsgmii)
+ SWITCH_PORT(4, 5, qsgmii)
+ SWITCH_PORT(5, 6, qsgmii)
+ SWITCH_PORT(6, 7, qsgmii)
+ SWITCH_PORT(7, 8, qsgmii)
+
+ SWITCH_PORT(8, 9, internal)
+ SWITCH_PORT(9, 10, internal)
+ SWITCH_PORT(10, 11, internal)
+ SWITCH_PORT(11, 12, internal)
+ SWITCH_PORT(12, 13, internal)
+ SWITCH_PORT(13, 14, internal)
+ SWITCH_PORT(14, 15, internal)
+ SWITCH_PORT(15, 16, internal)
+
+ SWITCH_PORT(16, 17, qsgmii)
+ SWITCH_PORT(17, 18, qsgmii)
+ SWITCH_PORT(18, 19, qsgmii)
+ SWITCH_PORT(19, 20, qsgmii)
+ SWITCH_PORT(20, 21, qsgmii)
+ SWITCH_PORT(21, 22, qsgmii)
+ SWITCH_PORT(22, 23, qsgmii)
+ SWITCH_PORT(23, 24, qsgmii)
+
+ SWITCH_PORT(24, 25, qsgmii)
+ SWITCH_PORT(25, 26, qsgmii)
+ SWITCH_PORT(26, 27, qsgmii)
+ SWITCH_PORT(27, 28, qsgmii)
+
+ port@28 {
+ ethernet = <ðernet0>;
+ reg = <28>;
+ phy-mode = "internal";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
--
2.39.2
--- End Message ---
