Dear Sascha,

Thanks for your answer. I came to the solution yesterday, and now I have
the last barebox properly running in the system. Nevertheless it only
leaves me at the same point I was before upgrading the barebox. I have a
OSELAS BSP system with latest barebox (just now) and kernel up & running.
Despite using ubifs or jffs, when i start filling up the space in the nand
(the image write goes well and i can boot in the system) by for example,
downloading a big file from the network, two many (I have tested it in more
than one board) CRC errors appear. In fact, there is so many that the boot
process get delayed about 10 minutes because the system is printing all the
detected errors.

I think I know where the problem is, new SLC nand chips from samsungs had
modified too many specifications from previous chips, specifically they no
longer support sub-page writes (4 NOP -> 1 NOP) and have different timings.
I have included the flag NAND_NO_SUBPAGE_WRITE in the nand options, both in
barebox and kernel, but it doesn't solve the problem. I am currently trying
to see if there is some place where 512bytes (it was the subpage write size
in previous chip dies) is hardcoded somewhere. I have seen reports from
other people in other platforms having the same problem, but sadly, I
haven't been able to identify any working solution.

If you have any good advice, I would be really happy to ear it! Also, if
you know of someone dealing with the same issue please, let me know.

Best regards,

Carlos Leyva



-- 



On 21 November 2014 08:34, Sascha Hauer <[email protected]> wrote:

> Hi Carlos,
>
> On Wed, Nov 19, 2014 at 11:21:23AM +0100, Carlos Leyva Guerrero wrote:
> >    Dear Juergen and Sasha,
> >    I'have included you both given that you (Juergen) is the one working
> with
> >    the ptxdist version for the mini2440 and you (Sasha) are currently
> >    developing barebox.
> >    Juergen is aware of a problem we have with the new mini2440 boards
> due to
> >    a change of the nand device because EOL of the previous part. Some
> >    adjustments need to be done to the nand controller to disallow partial
> >    programming because the new chip doesn't support it (and also have
> worse
> >    timings).
> >    In any case, I am trying to solve it but also to update the barebox
> to its
> >    latest version (2014.11.0). I have already ported the env structure
> to the
> >    new format on barebox. When booting from nor (vivi) and then loading
> >    barebox on ram, I have no problems (beside the fact that I haven't
> >    implemented the new methods for barebox_update and have temporary
> solved
> >    it by including the update scripts from previous versions). However,
> when
> >    I try to load from the NAND nothing happens, no output in the serial
> port.
> >    I'm trying to setup a arm debugger+opencd setup to see if I can find
> out
> >    what could be happening but for the time being, I don't have yet the
> >    required HW.
> >    Surfing through the code in both releases (the one in last git
> respository
> >    for 2440, barebox 2011.05.0 and the last one available on barebox
> webpage
> >    (2014.11.0) I haven't found any major differences (that could cause
> this
> >    behaviour) besides one specific modification in lowlevel.S that
> replaces
> >    TEXT_BASE for TEXT_BASE - SZ_2M in the nand load routine. Do you now
> the
> >    reason for such a change?
>
> The reason is inside the commit message doing this change:
>
> commit 558d72dc5116fc6275ea77c783cc65d6d1a5b521
> Author: Michael Olbrich <[email protected]>
> Date:   Sun May 18 16:46:29 2014 +0200
>
>     ARM Samsung: fix booting from NAND with pbl
>
>     The ARM pbl is linked at (TEXT_BASE - SZ_2M). This conflicts with the
> temporary
>     stack used in s3c24x0_nand_boot. Moving the stack to (TEXT_BASE -
> SZ_2M) fixes
>     this problem. With this patch a compressed barebox with pbl can boot on
>     mini2440 from NAND.
>
>     Signed-off-by: Michael Olbrich <[email protected]>
>     Signed-off-by: Sascha Hauer <[email protected]>
>
> So PBL support did not work without this change. You could revert this
> change for testing purposes if you do not have PBL enabled.
>
> >    Btw, i forgot to mention that I've also added the required
> modifications
> >    for proper management of 'big (>=128Mb) nands' using the patches from
> >    previous version as a base.
> >    Can any of you provide some help regarding this issue? Specifically,
> have
> >    been there any attempts to update barebox to its last version for
> >    mini2440? Could any of you provide an inner point of view and some
> >    possible explanation for the impossibility to boot from nand?
>
> I am not familiar with the Samsung SoCs, so I have no idea what could go
> wrong. I can only ask some silly or not so silly questions, like: Do
> both Nand chips have the same page size? Can you find out which
> combinations work? Right now you have an old barebox and a new barebox,
> an old board and a new board. Also, is writing to the NAND the problem,
> or is what is written the problem, i.e. can you write a new barebox with
> the old barebox or vice versa? I think you have to make some systematic
> tests.
>
> Sascha
>
> --
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