Hi Juergen, 2015-02-26 11:42 GMT+01:00 Guillermo Rodriguez Garcia <guille.rodrig...@gmail.com>: > 2015-02-26 10:53 GMT+01:00 Juergen Borleis <j...@pengutronix.de>: >> Hi Guillermo, >> >> On Thursday 26 February 2015 09:32:56 Guillermo Rodriguez Garcia wrote: >>> 2015-02-25 23:10 GMT+01:00 Juergen Borleis <juer...@kreuzholzen.de>: >>> > Guillermo Rodriguez Garcia wrote: >>> >> [...] >>> >> Question: Does it make sense to patch the mini2440 initialisation code >>> >> in [1] so that the SDRAM controller is always initialised, even if >>> >> running as a 2nd stage bootloader? >>> > >>> > You can't do so. Running from RAM and initializing it will crash the >>> > actually running code. >>> >>> Actually the only registers that would need to be "patched" are >>> BANKSIZE and BANKCON7, to setup the correct SDRAM size. Everything >>> else can be kept as is. >>> >>> This should be safe if I understand correctly. The S3C2440 datasheet >>> only mentions that the MRSR registers should not be reconfigured when >>> running from SDRAM. But there is no need to touch these. >>> >>> I tested this (writing the correct values to BANKSIZE and BANKCON7 >>> once barebox is running) and all seems to work fine. It is actually >>> very easy to do a quick test from the barebox console itself, you can >>> just try: >>> >>> mini2440:/ mw -l 0x48000020 0 (disables bank 7) >>> mini2440:/ mw -l 0x48000028 0xb1 (fixes bank size) >>> >>> What do you think? >> >> What I think? We try to tweak a corner case of a bogus supervivi. Is its >> worth >> the code change? > > Well, I guess it depends on whether it is just a corner case or > something more common :-) I said "some versions of supervivi" because > obviously I can't test them all, and as you know there's no > documentation or source code available that I can check. But it > definitely happens on all boards I've tested. > > If you have a mini2440 with you, perhaps you could do a quick check to > see if it also happens on your board ?
I just submitted a patch for this (btw sorry for the subject line; something went wrong while editing with git send-email --annotate) The patch should do nothing if barebox is booting from NOR or NAND directly, and only needs to modify two SDRAM registers (which should be safe according to the datasheet) if it is running as a 2nd stage bootloader and detects that the SDRAM controller is misconfigured. Best, Guillermo Rodriguez Garcia guille.rodrig...@gmail.com
