On 1/13/26 12:10 PM, Dumitru Ceara wrote:
> On 1/12/26 5:01 PM, Eelco Chaudron wrote:
>>
>>
>> On 6 Jan 2026, at 15:31, Dumitru Ceara via dev wrote:
>>
>>> OVN relies heavily in its OpenFlow rules on the registers that are
>>> provided by OVS. With the OVN feature set increasing we are slowly but
>>> surely running out of register space.
>>>
>>> The suggestion to increase the number of OVS registers again (last time
>>> this happened was with 847b8b027af4 ("Increase number of registers to
>>> 16.")), keeps being brought up on the mailing list, most recently in [0]
>>> and [1]. The alternative would be to work around the register space
>>> issue in OVN by using approaches like pushing/popping registers to the
>>> stack. But that would complicate the OVN pipeline even further.
>>>
>>> Instead this patch increases the number of general purpose 32-bit
>>> registers to 32. That implies that the number of 64-bit registers
>>> (xreg) also increases to 16 and the number of 128-bit registers (xxreg)
>>> increases to 8.
>>>
>>> There's currently not enough space in the NXM_NX class for the new 16
>>> registers so we use the NXOXM_ET class instead. According to commit
>>> 508a933809f8 ("nx-match: Add support for experimenter OXM.") this is the
>>> right class to use for field extensions.
>>>
>>> NOTE: Commit 85be6684f8af ("meta-flow: Fix the NXM_NX_* names of xxreg2
>>> and xxreg3.") had added placeholders for future expansion for four more
>>> xxregs (xxreg4-7) in the NXM_NX class. However, since now the
>>> new reg16-31 registers are added to the NXOXM_ET class, we also add
>>> the corresponding xxreg4-7 to it.
>>>
>>> [0] https://mail.openvswitch.org/pipermail/ovs-dev/2025-October/426703.html
>>> [1] https://mail.openvswitch.org/pipermail/ovs-dev/2025-December/428768.html
>>>
>>> Suggested-by: Ilya Maximets <[email protected]>
>>> Reported-at: https://issues.redhat.com/browse/FDP-2843
>>> Signed-off-by: Dumitru Ceara <[email protected]>
>>
>> Thanks, Dumitru, for working on this change! It looks good to me. There are
>> a few small nits, but with those addressed:
>>
>
> Hi Eelco,
>
>> Acked-by: Eelco Chaudron [email protected]
>>
>
> Thanks for the review!
>
> I have a v3 patch ready where the only changes are the fixes for the two
> comments you had below.
>
> But I see now on patchwork that the v2 patch [0] is delegated to Ilya so
> I'll wait a bit with posting v3 in case there are more changes required.
On a quick glance, I think, you missed my comment about 'ofproto-dpif - .*
registers'
tests in ofproto-dpif.at. The rest seems fine. If you can add those in v3,
that
would be great.
Best regards, Ilya Maximets.
>
> Regards,
> Dumitru
>
> [0]
> https://patchwork.ozlabs.org/project/openvswitch/patch/[email protected]/
>
>>> ---
>>> V2:
>>> - Addressed Ilya's comments:
>>> - retitled commit
>>> - updated NEWS item
>>> - updated meta-flow comments and documentation
>>> - added ovs-ofctl.at and test_ofp.py tests
>>> ---
>>> NEWS | 1 +
>>> include/openflow/nicira-ext.h | 2 +-
>>> include/openvswitch/flow.h | 8 +-
>>> include/openvswitch/meta-flow.h | 142 +++++++--
>>> lib/dpif-netdev-extract-avx512.c | 2 +-
>>> lib/flow.c | 20 +-
>>> lib/flow.h | 2 +-
>>> lib/match.c | 2 +-
>>> lib/meta-flow.xml | 66 +++-
>>> lib/nx-match.c | 2 +-
>>> lib/odp-util.c | 6 +-
>>> lib/odp-util.h | 2 +-
>>> lib/ofp-match.c | 2 +-
>>> ofproto/ofproto-dpif-rid.h | 2 +-
>>> ofproto/ofproto-dpif-xlate.c | 2 +-
>>> python/ovs/tests/test_ofp.py | 202 +++++++++++++
>>> .../ovs_build_helpers/extract_ofp_fields.py | 2 +-
>>> tests/ofproto.at | 4 +-
>>> tests/ovs-ofctl.at | 284 +++++++++++++++++-
>>> 19 files changed, 683 insertions(+), 70 deletions(-)
>>>
>>> diff --git a/NEWS b/NEWS
>>> index ca7e66ab7b45..6bb45fc094e6 100644
>>> --- a/NEWS
>>> +++ b/NEWS
>>> @@ -30,6 +30,7 @@ Post-v3.6.0
>>> * The OOT kernel module: was deprecated in v2.15; was last present in
>>> the v2.17 release; and is no longer present in any supported release
>>> since v2.17 went EOL when v3.5 was released.
>>> + - Increased the number of registers to 32.
>>
>> Maybe add the word ‘OpenFlow’, so people know what registers we talk about?
>>
>
> Yes, definitely better.
>
>>
>>> v3.6.0 - 18 Aug 2025
>>
>> [...]
>>
>>> diff --git a/lib/meta-flow.xml b/lib/meta-flow.xml
>>> index 5c57ab08ff18..1ef77d284b42 100644
>>> --- a/lib/meta-flow.xml
>>> +++ b/lib/meta-flow.xml
>>> @@ -2902,10 +2902,20 @@ actions=clone(load:0->NXM_OF_IN_PORT[],output:123)
>>> </field>
>>>
>>> <field id="MFF_REG0" title="Register 0">
>>> - This is the first of several Open vSwitch registers, all of which
>>> have
>>> - the same properties. Open vSwitch 1.1 introduced registers 0, 1, 2,
>>> and
>>> - 3, version 1.3 added register 4, version 1.7 added registers 5, 6,
>>> and 7,
>>> - and version 2.6 added registers 8 through 15.
>>> + <p>
>>> + This is the first of several Open vSwitch registers, all of which
>>> have
>>> + the same properties. Open vSwitch 1.1 introduced registers 0, 1,
>>> 2,
>>> + and 3, version 1.3 added register 4, version 1.7 added registers
>>> 5, 6,
>>> + and 7, version 2.6 added registers 8 through 15, and version 3.7
>>> added
>>> + registers 16 through 31.
>>> + </p>
>>> +
>>> + <p>
>>> + Code points for registers 0 through 15 are defined within NXM_NX
>>> code
>>> + point prefix, while registers 16 through 31 are defined within
>>> + NXOXM_ET starting with NXOXM_ET_REG16 (17), due to limited space
>>> + within the NXM_NX class.
>>> + </p>
>>> </field>
>>> <!-- XXX series -->
>>> <field id="MFF_REG1" title="Register 1" hidden="yes"/>
>>> @@ -2923,6 +2933,22 @@ actions=clone(load:0->NXM_OF_IN_PORT[],output:123)
>>> <field id="MFF_REG13" title="Register 13" hidden="yes"/>
>>> <field id="MFF_REG14" title="Register 14" hidden="yes"/>
>>> <field id="MFF_REG15" title="Register 15" hidden="yes"/>
>>> + <field id="MFF_REG16" title="Register 16" hidden="yes"/>
>>> + <field id="MFF_REG17" title="Register 17" hidden="yes"/>
>>> + <field id="MFF_REG18" title="Register 18" hidden="yes"/>
>>> + <field id="MFF_REG19" title="Register 19" hidden="yes"/>
>>> + <field id="MFF_REG20" title="Register 20" hidden="yes"/>
>>> + <field id="MFF_REG21" title="Register 21" hidden="yes"/>
>>> + <field id="MFF_REG22" title="Register 22" hidden="yes"/>
>>> + <field id="MFF_REG23" title="Register 23" hidden="yes"/>
>>> + <field id="MFF_REG24" title="Register 24" hidden="yes"/>
>>> + <field id="MFF_REG25" title="Register 25" hidden="yes"/>
>>> + <field id="MFF_REG26" title="Register 26" hidden="yes"/>
>>> + <field id="MFF_REG27" title="Register 27" hidden="yes"/>
>>> + <field id="MFF_REG28" title="Register 28" hidden="yes"/>
>>> + <field id="MFF_REG29" title="Register 29" hidden="yes"/>
>>> + <field id="MFF_REG30" title="Register 30" hidden="yes"/>
>>> + <field id="MFF_REG31" title="Register 31" hidden="yes"/>
>>>
>>> <field id="MFF_XREG0" title="Extended Register 0">
>>> <p>
>>> @@ -2931,8 +2957,13 @@ actions=clone(load:0->NXM_OF_IN_PORT[],output:123)
>>> vSwitch already had 32-bit registers by that name, so Open vSwitch
>>> uses
>>> the name ``extended registers'' in an attempt to reduce confusion.
>>> The
>>> standard allows for up to 128 registers, each 64 bits wide, but
>>> Open
>>> - vSwitch only implements 4 (in versions 2.4 and 2.5) or 8 (in
>>> version
>>> - 2.6 and later).
>>> + vSwitch only implements 4 (in versions 2.4 and 2.5), 8 (in version
>>> + 2.6 and later), or 16 (in version 3.7 and later).
>>> + </p>
>>> +
>>> + <p>
>>> + Code points for all of the extended registers are defined within
>>> + OXM_OF_PKT_REG code point prefix.
>>> </p>
>>>
>>> <p>
>>> @@ -2961,6 +2992,14 @@ actions=clone(load:0->NXM_OF_IN_PORT[],output:123)
>>> <field id="MFF_XREG5" title="Extended Register 5" hidden="yes"/>
>>> <field id="MFF_XREG6" title="Extended Register 6" hidden="yes"/>
>>> <field id="MFF_XREG7" title="Extended Register 7" hidden="yes"/>
>>> + <field id="MFF_XREG8" title="Extended Register 8" hidden="yes"/>
>>> + <field id="MFF_XREG9" title="Extended Register 9" hidden="yes"/>
>>> + <field id="MFF_XREG10" title="Extended Register 10" hidden="yes"/>
>>> + <field id="MFF_XREG11" title="Extended Register 11" hidden="yes"/>
>>> + <field id="MFF_XREG12" title="Extended Register 12" hidden="yes"/>
>>> + <field id="MFF_XREG13" title="Extended Register 13" hidden="yes"/>
>>> + <field id="MFF_XREG14" title="Extended Register 14" hidden="yes"/>
>>> + <field id="MFF_XREG15" title="Extended Register 15" hidden="yes"/>
>>>
>>> <field id="MFF_XXREG0" title="Double-Extended Register 0">
>>> <p>
>>> @@ -2970,7 +3009,16 @@ actions=clone(load:0->NXM_OF_IN_PORT[],output:123)
>>> through <code>reg3</code>, with <code>reg0</code> supplying the
>>> most-significant bits of <code>xxreg0</code> and <code>reg3</code>
>>> the
>>> least-significant. <code>xxreg1</code> similarly overlays
>>> - <code>reg4</code> through <code>reg7</code>, and so on.
>>> + <code>reg4</code> through <code>reg7</code>, and so on. Open
>>> + vSwitch 4 128-bit registers (in versions 2.6 and later) and 8
>>
>> Should this be “Open vSwitch ‘only implements’ 4”?
>>
>
> Ah, yes, it should probably be like that.
>
>>> + (in version 3.7 and later).
>>> + </p>
>>> +
>>> + <p>
>>> + Code points for double-extended registers 0 through 3 are defined
>>> + within NXM_NX code point prefix, while registers 4 through 7 are
>>> + defined within NXOXM_ET starting with NXOXM_ET_XXREG4(33), due to
>>> + limited space within the NXM_NX class.
>>> </p>
>>> </field>
>>
>> [...]
>>
>
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