On Thu, Jun 17, 2021 at 05:18:25PM +0100, Cian Ferriter wrote: > From: Harry van Haaren <harry.van.haa...@intel.com> > > This commit enables the AVX512-VPOPCNTDQ Vector Popcount > instruction. This instruction is not available on every CPU > that supports the AVX512-F Foundation ISA, hence it is enabled > only when the additional VPOPCNTDQ ISA check is passed. > > The vector popcount instruction is used instead of the AVX512 > popcount emulation code present in the avx512 optimized DPCLS today. > It provides higher performance in the SIMD miniflow processing > as that requires the popcount to calculate the miniflow block indexes. > > Signed-off-by: Harry van Haaren <harry.van.haa...@intel.com> > > ---
Acked-by: Flavio Leitner <f...@sysclose.org> This patch series implements low level optimizations by manually coding instructions. I wonder if gcc couldn't get some relevant level of vectorized optimizations refactoring and enabling compiling flags. I assume the answer is no, but I would appreciate some enlightenment on the matter. Thanks, fbl _______________________________________________ dev mailing list d...@openvswitch.org https://mail.openvswitch.org/mailman/listinfo/ovs-dev