hi Chritian,
See the datasheet:
http://www.brain4home.eu/attachments/BAE0910%20datasheet.pdf
particularly on page 10 you will find the register list with description.
just forget about writebyte which was used for testing.
Pascal
2010/2/27 Christian Magnusson <[email protected]>
>
> Sorry for my laziness, but is there any documentation about all OWFS-files
> to control the BAE-chip?
> I could of course try to read the source, but for me it's not obvious what
> "910/duty1" controls etc...
>
> Anyone who can guide me a bit through the files?
>
> /Christian
>
>
> ./910
> ./910/adc
> ./910/adcan
> ./910/adcap
> ./910/adcc
> ./910/adctotn
> ./910/adctotp
> ./910/alan
> ./910/alap
> ./910/alarm
> ./910/alarmc
> ./910/alcps
> ./910/alct
> ./910/cnt
> ./910/cntc
> ./910/count
> ./910/cps
> ./910/date
> ./910/duty1
> ./910/duty2
> ./910/duty3
> ./910/duty4
> ./910/maxan
> ./910/maxap
> ./910/maxcps
> ./910/out
> ./910/outc
> ./910/ovruncnt
> ./910/pc0
> ./910/pc1
> ./910/pc2
> ./910/pc3
> ./910/period1
> ./910/period2
> ./910/pio
> ./910/pioc
> ./910/resetcnt
> ./910/rtcc
> ./910/selectcnt
> ./910/stalledcnt
> ./910/tpm1c
> ./910/tpm2c
> ./910/udate
> ./910/usera
> ./910/userb
> ./910/userc
> ./910/userd
> ./910/usere
> ./910/userf
> ./910/userg
> ./910/userh
> ./910/useri
> ./910/userj
> ./910/userk
> ./910/userl
> ./910/userm
> ./910/usern
> ./910/usero
> ./910/userp
> ./address
> ./alias
> ./bootstrap_version
> ./chip_type
> ./command
> ./crc8
> ./device_type
> ./device_version
> ./eeprom
> ./eeprom/erase.ALL
> ./eeprom/erase.0
> ./eeprom/erase.1
> ./eeprom/memory
> ./eeprom/page.ALL
> ./eeprom/page.0
> ./eeprom/page.1
> ./family
> ./firmware
> ./firmware/function
> ./id
> ./localtype
> ./locator
> ./memory
> ./present
> ./r_address
> ./r_id
> ./r_locator
> ./type
> ./version
> ./writebyte
>
>
>
>
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>
> ------------------------------------------------------------------------------
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--
Pascal
www.brain4home.eu
------------------------------------------------------------------------------
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proactively, and fine-tune applications for parallel performance.
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