someone wrote:
>your Intel description is a little off, possibly because your sample number
>only had 7 digits.
>
> 68K: 0x01234567 stored as 01 23 45 67
>Intel: 0x01234567 stored as 67 45 23 01
To be pedantically complete, one needs to add a little more information
to the above big-endian, little-endian description:
big-endian (68K, MacOS, PalmPilot):
0x01234567L is stored as 01 23 45 67 assuming byte memory addresses
ascending left to right ( +0 +1 +2 +3 )
little-endian (x86, Wintel):
0x01234567L is stored as 01 23 45 67 assuming byte memory addresses
ascend right to left ( +3 +2 +1 +0 )
or
0x01234567L is stored as 67 45 23 01 assuming byte memory addresses
ascend left to right ( +0 +1 +2 +3 )
not all cultures (or core dump formats for that matter) read left to
right.
not all computers use byte addresses. not all bytes are 8-bits. etc.
etc.
Some CPUS support either endianess (MIPS, Alpha); but a given OS usually
supports only one (usually big).
Relevant to future PalmOS development: what endianess does ARM/EPOC use?
IMHO. YMMV.
--
Ron Nicholson
http://www.nicholson.com/rhn/palm/
