If you're going to be accessing the hardware registers directly, why 
not just read the CPU frequency from them?  This is how I do it for 
the VZ -- the SZ may be different (if that's what the NR70 uses).

int32 EmRegsVz::GetSystemClockFrequency (void)
{
     uint16  pllControl  = READ_REGISTER (pllControl);
     uint16  pllFreqSel  = READ_REGISTER (pllFreqSel);

     // Convert the 32.768KHz clock (CLK32) into the PLLCLK frequency.

     uint16  PC          = (pllFreqSel & 0x00FF);
     uint16  QC          = (pllFreqSel & 0x0F00) >> 8;

     uint32  result      = 32768L * 2 * (14 * (PC + 1) + QC + 1);

     // Divide by the first prescaler, if needed.

     if ((pllControl & hwrVZ328PLLControlPreSc1Div2) != 0)
     {
         result /= 2;
     }

     // Divide by the second prescaler, if needed.

     if ((pllControl & hwrVZ328PLLControlPreSc2Div2) != 0)
     {
         result /= 2;
     }

     // Divide by the system clock scaler, if needed.

     switch (pllControl & 0x0F00)
     {
         case hwrVZ328PLLControlSysDMADiv2:
             result /= 2;
             break;

         case hwrVZ328PLLControlSysDMADiv4:
             result /= 4;
             break;

         case hwrVZ328PLLControlSysDMADiv8:
             result /= 8;
             break;

         case hwrVZ328PLLControlSysDMADiv16:
             result /= 16;
             break;
     }

     return result;
}

-- Keith


At 11:11 AM -0700 7/20/02, Robert Hildinger wrote:
>I've created the code below to calculate the CPU speed of a Sony 
>Clie NR70 in MHz. The code works by calculating the time it takes to 
>execute a block of 250 NOP instructions, which according to Motorola 
>documentation takes 4 cycles to execute. 250 NOPs therefore equate 
>to 1000 CPU cycles. The clock frequency is then easy to compute as a 
>1000 cycles divided by the time take to execute in seconds. Easy, 
>huh?
>
>Well, here's the problem... This code returns a value of 42-43 MHz 
>every time, which is great except that the NR70's processor is 
>supposed to run at 66 Mhz, and I'm at a loss as to figure out why 
>there is such a discrepancy. I believe this calculation to be 
>accurate, but the difference in results is undeniable. I thought 
>that the problem might lie in interrupt procesing during my timing 
>block, but the block is only a 1000 cycles long, but I can't see 
>interrupts coming in consistently during such a short duration...
>
>Any thoughts????
>
>Thanks!
>-Robert Hildinger
>
>#define TCN1   0xfffff608;   // Address of hardware TIMER 1 on Sony
>                              // NR70 (DragonBall Super VZ- runs at
>                              // 5526869 Hz
>#define IMR    0xfffff304;   // Address of NR70 Interrupt Mask Reg.
>
>static void RunSpeedTest(void)
>{
>     ...
>     time = (volatile UInt16 *)TCN1;
>     imr = (volatile UInt32 *)IMR;
>     ...
>}

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