Hi,
Here is a patch to modify the usrp fpga_master_clock using
set_fpga_master_clock(long mc). The same functionality is added to
gr-usrp.
I have one doubt about the patch. How do we make sure that you call
set_fpga_master_clock early enough? Adding the fpga_master_clock
parameter to the constructor of usrp_base might be a better idea. But
I only thought about this while writing this mail :). I'll make
another patch if you guys feel that setting fpga_master_clock in the
constructor is a better idea.
juha
Index: usrp/host/lib/legacy/usrp_basic.h
===================================================================
--- usrp/host/lib/legacy/usrp_basic.h (revision 8688)
+++ usrp/host/lib/legacy/usrp_basic.h (working copy)
@@ -62,6 +62,7 @@
int d_usb_data_rate; // bytes/sec
int d_bytes_per_poll; // how often to poll for overruns
bool d_verbose;
+ long d_fpga_master_clock; // possibly user configurable master clock
static const int MAX_REGS = 128;
unsigned int d_fpga_shadows[MAX_REGS];
@@ -119,9 +120,14 @@
/*!
* \brief return frequency of master oscillator on USRP
*/
- long fpga_master_clock_freq () const { return 64000000; }
+ long fpga_master_clock_freq ();
/*!
+ * \brief set the user configured fpga master clock (default 64 MHz)
+ */
+ bool set_fpga_master_clock_freq (long mc);
+
+ /*!
* \returns usb data rate in bytes/sec
*/
int usb_data_rate () const { return d_usb_data_rate; }
@@ -392,9 +398,9 @@
// ACCESSORS
//! sampling rate of A/D converter
- virtual long converter_rate() const { return fpga_master_clock_freq(); } // 64M
- long adc_rate() const { return converter_rate(); }
- long adc_freq() const { return converter_rate(); } //!< deprecated method name
+ virtual long converter_rate();
+ long adc_rate();
+ long adc_freq(); //!< deprecated method name
/*!
* \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
@@ -637,9 +643,9 @@
// ACCESSORS
//! sampling rate of D/A converter
- virtual long converter_rate() const { return fpga_master_clock_freq () * 2; } // 128M
- long dac_rate() const { return converter_rate(); }
- long dac_freq() const { return converter_rate(); } //!< deprecated method name
+ virtual long converter_rate();
+ long dac_rate();
+ long dac_freq();
/*!
* \brief Return daughterboard ID for given Tx daughterboard slot [0,1].
Index: usrp/host/lib/legacy/usrp_basic.cc
===================================================================
--- usrp/host/lib/legacy/usrp_basic.cc (revision 8688)
+++ usrp/host/lib/legacy/usrp_basic.cc (working copy)
@@ -110,7 +110,8 @@
: d_udh (0),
d_usb_data_rate (16000000), // SWAG, see below
d_bytes_per_poll ((int) (POLLING_INTERVAL * d_usb_data_rate)),
- d_verbose (false)
+ d_verbose (false),
+ d_fpga_master_clock(64000000)
{
/*
* SWAG: Scientific Wild Ass Guess.
@@ -172,6 +173,41 @@
return true; // nop
}
+long
+usrp_basic::fpga_master_clock_freq ()
+{
+ return d_fpga_master_clock;
+}
+
+bool
+usrp_basic::set_fpga_master_clock_freq (long mc)
+{
+ if(mc < 10000000 || mc > 64000000)
+ throw std::out_of_range ("usrp_basic: invalid fpga_master_clock (should be {10..64} MHz)");
+ d_fpga_master_clock = mc;
+ return(true);
+}
+
+long
+usrp_basic_rx::converter_rate()
+{
+ return fpga_master_clock_freq();
+}
+
+long
+usrp_basic_rx::adc_rate()
+{
+ return converter_rate();
+}
+
+//!< deprecated method name
+long
+usrp_basic_rx::adc_freq()
+{
+ return converter_rate();
+}
+
+
void
usrp_basic::set_usb_data_rate (int usb_data_rate)
{
@@ -1068,6 +1104,27 @@
d_ephandle->wait_for_completion ();
}
+
+long
+usrp_basic_tx::converter_rate()
+{
+ return fpga_master_clock_freq () * 2;
+}
+
+long
+usrp_basic_tx::dac_rate()
+{
+ return converter_rate();
+}
+
+//!< deprecated method name
+long
+usrp_basic_tx::dac_freq()
+{
+ return converter_rate();
+}
+
+
bool
usrp_basic_tx::set_tx_enable (bool on)
{
Index: gr-usrp/src/usrp1_source_base.h
===================================================================
--- gr-usrp/src/usrp1_source_base.h (revision 8688)
+++ gr-usrp/src/usrp1_source_base.h (working copy)
@@ -165,12 +165,14 @@
*/
double pga_db_per_step () const;
+ bool set_fpga_master_clock_freq(long mc);
+
// ACCESSORS
- long fpga_master_clock_freq() const;
- long converter_rate() const;
- long adc_rate() const { return converter_rate(); } // alias
- long adc_freq() const { return converter_rate(); } // deprecated alias
+ long fpga_master_clock_freq();
+ long converter_rate();
+ long adc_rate(); // alias
+ long adc_freq(); // deprecated alias
unsigned int decim_rate () const;
int nchannels () const;
Index: gr-usrp/src/usrp1_sink_base.cc
===================================================================
--- gr-usrp/src/usrp1_sink_base.cc (revision 8688)
+++ gr-usrp/src/usrp1_sink_base.cc (working copy)
@@ -163,17 +163,35 @@
}
long
-usrp1_sink_base::fpga_master_clock_freq() const
+usrp1_sink_base::fpga_master_clock_freq()
{
return d_usrp->fpga_master_clock_freq();
}
+bool
+usrp1_sink_base::set_fpga_master_clock_freq(long mc)
+{
+ return d_usrp->set_fpga_master_clock_freq(mc);
+}
+
long
-usrp1_sink_base::converter_rate () const
+usrp1_sink_base::converter_rate ()
{
return d_usrp->converter_rate ();
}
+long
+usrp1_sink_base::dac_rate ()
+{
+ return d_usrp->converter_rate ();
+}
+
+long
+usrp1_sink_base::dac_freq ()
+{
+ return d_usrp->converter_rate ();
+}
+
unsigned int
usrp1_sink_base::interp_rate () const
{
Index: gr-usrp/src/usrp1.i
===================================================================
--- gr-usrp/src/usrp1.i (revision 8688)
+++ gr-usrp/src/usrp1.i (working copy)
@@ -94,10 +94,18 @@
// ACCESSORS
- long fpga_master_clock_freq() const;
- long converter_rate() const; // D/A sample rate
- long dac_rate() const; // alias
- long dac_freq () const; // deprecated name. Use converter_rate() or dac_rate().
+ /*!
+ * \brief return frequency of master oscillator on USRP
+ */
+ long fpga_master_clock_freq();
+ /*!
+ * \brief Set fpga_master_clock.
+ * \param mc master clock freq in Hz. should be between {10..64} MHz.
+ */
+ bool set_fpga_master_clock_freq(long mc);
+ long converter_rate(); // D/A sample rate
+ long dac_rate(); // alias
+ long dac_freq (); // deprecated name. Use converter_rate() or dac_rate().
unsigned int interp_rate () const;
double tx_freq (int channel) const;
@@ -327,11 +335,20 @@
// ACCESSORS
- long fpga_master_clock_freq() const;
- long converter_rate() const; // A/D sample rate
- long adc_rate() const; // alias
- long adc_freq() const; // Deprecated name. Use converter_rate() or adc_rate().
+ /*!
+ * \brief return frequency of master oscillator on USRP
+ */
+ long fpga_master_clock_freq();
+ /*!
+ * \brief Set fpga_master_clock.
+ * \param mc master clock freq in Hz. should be between {10..64} MHz.
+ */
+ bool set_fpga_master_clock_freq(long mc);
+ long converter_rate(); // A/D sample rate
+ long adc_rate(); // alias
+ long adc_freq(); // Deprecated name. Use converter_rate() or adc_rate().
+
unsigned int decim_rate () const;
double rx_freq (int channel) const;
int noverruns () const { return d_noverruns; }
Index: gr-usrp/src/usrp1_source_base.cc
===================================================================
--- gr-usrp/src/usrp1_source_base.cc (revision 8688)
+++ gr-usrp/src/usrp1_source_base.cc (working copy)
@@ -160,17 +160,35 @@
}
long
-usrp1_source_base::fpga_master_clock_freq() const
+usrp1_source_base::fpga_master_clock_freq()
{
return d_usrp->fpga_master_clock_freq();
}
+bool
+usrp1_source_base::set_fpga_master_clock_freq(long mc)
+{
+ return d_usrp->set_fpga_master_clock_freq(mc);
+}
+
long
-usrp1_source_base::converter_rate() const
+usrp1_source_base::converter_rate()
{
return d_usrp->converter_rate();
}
+long
+usrp1_source_base::adc_rate()
+{
+ return d_usrp->converter_rate();
+}
+
+long
+usrp1_source_base::adc_freq()
+{
+ return d_usrp->converter_rate();
+}
+
unsigned int
usrp1_source_base::decim_rate () const
{
Index: gr-usrp/src/usrp1_sink_base.h
===================================================================
--- gr-usrp/src/usrp1_sink_base.h (revision 8688)
+++ gr-usrp/src/usrp1_sink_base.h (working copy)
@@ -142,13 +142,14 @@
*/
double pga_db_per_step () const;
+ bool set_fpga_master_clock_freq(long mc);
// ACCESSORS
- long fpga_master_clock_freq() const;
- long converter_rate() const;
- long dac_rate() const { return converter_rate(); } // alias
- long dac_freq() const { return converter_rate(); } // deprecated alias
+ long fpga_master_clock_freq();
+ long converter_rate();
+ long dac_rate(); // alias
+ long dac_freq(); // deprecated alias
unsigned int interp_rate () const;
int nchannels () const;
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