Verification / Validation Engineer Jobs – Immediate Interviews.

REQUIREMENT ONE: IP –Verification/Validation engineer – Bayarea, CA
REQUIREMENT TWO: UMD UVM Verification Engineer– Bayarea, CA


REQUIREMENT ONE: IP Level Verification/Validation
REQUIRED SKILLS/EXPERIENCE:
Strong background in IP-level verification
AXI-3/4 Protocol experience.
Performance benchmarking experience.
Verification Expertise in System Verilog
Expert in Verification methodologies (UVM, OVM, VMM)
8-10+ years of experience in IP/Sub-system level verification
5+ years in SystemVerilog
2+ years in UVM
Experience with AXI-3/4 protocol, NoC, cache controller
JOB RESPONSIBILITIES:
Experience developing Verification components from scratch
Experience in Test plan and Test Case creations>
Sound debugging skills


REQUIREMENT TWO:  UMD Verification/Validation engineer
REQUIRED SKILLS/EXPERIENCE:
User Mode Driver (UMD) Development
6 years UVM Experience and PCIe expertise .
Hand-on experience in software distribution and installation
Hand-on experience in C/C++
Develop / port driver
Integrate UMD with AAL (Intel Accelerator Abstract Layer) interface
JOB RESPONSIBILITIES:
Experience developing Verification components from scratch
Experience in Test plan and Test Case creations>
Sound debugging skills


GENERAL INFORMATION FOR TWO POSITIONS:
Mid to senior level roles
High priority
Open to any visa
W2 pay-terms only
No visa transfers possible with this client
Telephonic interviews only
Onsite job in CA – No remote option
3-8 years of relevant experience is good to start with
Prefer atleast a bachelor’s degree or its equivalent
Authorized to work in US
Can apply to any one or either of the positions.
These are fulltime positions on W2 for long-term contract duration.

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