Hi Phil, Info looks terrific !
Will check out further. Thanks Kind Regards, Peter Krause R & D Principal Technical Officer GPT Designs Pty Ltd 0427 149 198 07 5478 1387 Minyama, QLD Australia -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Phillip Stevens Sent: Saturday, 5 August 2006 5:14 AM To: Protel EDA Discussion List Subject: Re: [PEDA] Backplane Design Peter, Have you seen the backplane topic here?: http://www.sigcon.com/pubsIndex.htm ---Phil PK> Hi, PK> I am looking for suggestions for an effective backplane design process for PK> vga video interconnections. PK> Any suggestion would be most welcome. PK> I have searched google, and have found a lot of info on high speed data, but PK> not much on video. PK> Kind regards, PK> Peter Krause PK> Principal Technical Officer PK> R & D PK> GPT Designs Pty Ltd PK> www.gptdesigns.com.au PK> [EMAIL PROTECTED] ____________________________________________________________ You are subscribed to the PEDA discussion forum To Post messages: mailto:[email protected] Unsubscribe and Other Options: http://techservinc.com/mailman/listinfo/peda_techservinc.com Browse or Search Old Archives (2001-2004): http://www.mail-archive.com/[email protected] Browse or Search Current Archives (2004-Current): http://www.mail-archive.com/[email protected] -- No virus found in this incoming message. Checked by AVG Free Edition. Version: 7.1.394 / Virus Database: 268.10.5/406 - Release Date: 2/08/2006 ____________________________________________________________ You are subscribed to the PEDA discussion forum To Post messages: mailto:[email protected] Unsubscribe and Other Options: http://techservinc.com/mailman/listinfo/peda_techservinc.com Browse or Search Old Archives (2001-2004): http://www.mail-archive.com/[email protected] Browse or Search Current Archives (2004-Current): http://www.mail-archive.com/[email protected]
