If you are breaking apart bare boards first, then stuffing, the risks
are small. If you want to stuff the panel, then break it apart, there
can be problems. Talk to your assembler about the best way to prepare
the board for safe separation after stuffing (minimize the stress on
installed components).
Richard
At 11:54 AM 10/17/2006, you wrote:
For V-grooved, I use 1mm. Be careful when mixing V-grooved & different
sized PCBs. You want to make sure that there is always a full length of
panel material where you can break apart the PCBs with relative ease.
Otherwise, the dificulty in trying to break off a PCB closed in on 2 sides
may result in damaging a few of the PCBs due to stress when bending.
______________________
Brian Guralnick
Vergent Technologies Inc.
[EMAIL PROTECTED]
----- Original Message -----
From: "Yves" <[EMAIL PROTECTED]>
To: "'Brian Guralnick'" <[EMAIL PROTECTED]>; "'Protel EDA
Discussion List'" <[email protected]>
Sent: Tuesday, October 17, 2006 11:35 AM
Subject: Re: [PEDA] Generating panel of PCBs in P99se is super slow...
> Brian,
>
> When you do your panel layout, what is the space you put in between board
> when they are v-grooved.
>
> Thanks for the panel it looks quite good.
>
>
> Yves Dubois
>
> Raytron LTD.
> Montreal que.
>
>
> -----Original Message-----
> From: [EMAIL PROTECTED]
> [mailto:[EMAIL PROTECTED] Behalf Of Brian Guralnick
> Sent: October 17, 2006 9:59 AM
> To: Protel EDA Discussion List
> Subject: Re: [PEDA] Generating panel of PCBs in P99se is super slow...
>
>
> The idea in preparing your own panel is to save set-up fees for each
> 'different' PCB you are submiting. If you are sending replicas of just 1
> PCB, just tell your PCB manufacturer how you want it panneled & there is
> not
> price difference.
>
> Now, if you have something like 5 different PCBs, espicially when doing
> prototypes, starting your own panel willcut your setup fees from 5 down to
> 1. Your PCB manufacturer has no problems cutting them up.
>
> How To:
> In step #1, I have a template, or, a set of margins drawn out on
> mechanicle layer #1. These 2 sets of measurements you actually get from
> your PCB manufacturer, 1 being the outer panel size & the border indent
> where it is safe to start placing PCBs. Remember, to open all additional
> layers you may need for the PCBs you may be using. I have not yet done a
> panel with true power planes, in that case, you PCBs will need to have the
> same net names. Remember to import design rules to get all your
> paste/soldier mask/power plane expansions/clearances...
>
> Example: http://www.bigupload.com/d=89F6ABBE
>
> On all my PCBs, I place a border around them on mechanicle layer 1
> which
> in my PCB description, I explain that the PCBs actual size relates to
> those
> borders. I use mechanicle layer 2 to place a larger box outsize of each
> PCB
> and 1/2 the closest safe distance between PCBs allowed. Get this
> measurement from your PCB manufacturer. When copying & pasting, working
> with electrical grid on & mechanicle layer2 active, all my boards will
> space
> out to proper
> distance.
>
> Remeber, you dont need to actually fill the panel completely, just get
> everything you need on the panel in the proportions you want & the PCB
> manufacturer will fill out the rest of the panel to their liking. I
> usually
> fill close to the full width of the panel & vertically stack everything
> nice.
>
> Good luck...
>
>
> ______________________
> Brian Guralnick
> Vergent Technologies Inc.
> 438 Brahms Ave.
> Dollard Des Ormeaux
> Quebec, Canada
> H9G 2S6
> (514) 624-4003
> [EMAIL PROTECTED]
>
>
> ----- Original Message -----
> From: "Dusan Mihajlovic" <[EMAIL PROTECTED]>
> To: "Brian Guralnick" <[EMAIL PROTECTED]>; "Protel EDA
> Discussion List" <[email protected]>
> Sent: Tuesday, October 17, 2006 3:24 AM
> Subject: Re: [PEDA] Generating panel of PCBs in P99se is super slow...
>
>
>> Hi, what i am interested is how the manufacturer will interpret this
>> panel
>> PCB. Do you have to make panel size KeepOut Layer in Step 1? Will the
>> manufacturer cut the panel into smaller PCB or will they deliver the
>> panel
>> in
>> original size?
>>
>> --- Brian Guralnick <[EMAIL PROTECTED]> wrote:
>>
>>> Ok, here we go!
>>>
>>> Step 1, Prep a panel PCB document, in the that PCB document, disable
>>> online
>>> DRC.
>>>
>>> Step 2, save all your different PCBs to a second stage file before you
>>> copy
>>> & paste it to the panel PCB.
>>>
>>> Step 3, on all the second stage file PCBs, in the menu ' Tools ->
>>> Convert
>>> ->
>>> Explode Polygon To Free Primitives '
>>> Perform the 'Explode...' to all your polygon planes on the
>>> PCB.
>>> Step 4, under ' Design -> Netlist Manager -> Menu -> Clear All Nets...
>>> '.
>>>
>>> Perform steps 3 & 4 for all your second stage PCB files & save them.
>>>
>>> Now, copy from the second stage PCB files & "paste SPECIAL (duplicate
>>> designators)" into the panel PCB document as many times as you like. It
>>> will paste so quickly, you can go mad. And, the Client99.exe out of
>>> memory,
>>> or, contineous bonging error will no longer appear. I've just managed a
>>> 10
>>> megabyte PCB panel with ease...
>>>
>>> Good Luck!
>>>
>>> ______________________
>>> Brian Guralnick
>>> Vergent Technology Inc.
>>> [EMAIL PROTECTED]
>>>
>>>
>>> ----- Original Message -----
>>> From: "Leo Potjewijd" <[EMAIL PROTECTED]>
>>> To: "Protel EDA Discussion List" <[email protected]>
>>> Sent: Monday, October 16, 2006 2:18 AM
>>> Subject: Re: [PEDA] Generating panel of PCBs in P99se is super slow...
>>>
>>>
>>> > Euhrr.... Would you care to share that trick with us? I ran into that
>>> > very same problem about six weeks ago.
>>> > It was not a very large panel so I put up with it, but when I need to
>>> > modify it for any reason.....
>>> >
>>> > Leo
>>> >
>>> >
>>> > At 16/10/06 04:34, Brian Guralnick wrote:
>>> >>Never mind, I figured out how to get protel to create panels without
>>> >>the
>>> >>annoying "Processing pasted primitives".
>>> >>It works like a dream now...
>>> >>
>>> >>______________________
>>> >>Brian Guralnick
>>> >>Vergent Technology Inc.
>>> >>[EMAIL PROTECTED]
>>> >>
>>> >>
>>> >>----- Original Message -----
>>> >>From: "Brian Guralnick" <[EMAIL PROTECTED]>
>>> >>To: "Protel EDA Discussion List" <[email protected]>
>>> >>Sent: Sunday, October 15, 2006 8:42 PM
>>> >>Subject: [PEDA] Generating panel of PCBs in P99se is super slow...
>>> >>
>>> >>
>>> >> > Hi,
>>> >> >
>>> >> > I'm creating a large panel of smaller PCBs in P99se. The
>>> >> > smaller
>>>
>>> >> > PCBs
>>> >> > all have 3 polygon planes each. The copy & pasting is becoming
>>> >> > exponetially
>>> >> > slower as I add more PCBs to the panel. Right after the pastes,
>>> protel
>>> >> > gets
>>> >> > stuck in "Processing pasted primitives". Is there a way within
>>> protel
>>> >> > to
>>> >> > speed up, or, bypass the "Processing pasted primitives"?
>>> >> >
>>> >> > ______________________
>>> >> > Brian Guralnick
>>> >> > Vergent Technology Inc.
>>> >> > [EMAIL PROTECTED]
>>> >
>>> >
>>> >
>>> >
>>> > ____________________________________________________________
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