Hello,
We're trying to measure L2D MISSES on a Xeon Woodcrest (a dual cpu, dual
core machine).
We've tried different hardware counters, namely :
- LAST_LEVEL_CACHE_MISSES, which, the documentation says, is equivalent
to L2_RQSTS:I_STATE (invalid cachelines), but doesn't count the hardware
prefetches
- L2_RQSTS:MESI, and various combinations between M/E/S/I options, as
well as PREFETCH combined with the mask SELF.
We're trying to measure accurately the L2 data misses, but we're getting
inconsistent results. How must we proceed ?
Thanks,
--
Stéphane Zuckerman
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