On Fri, Mar 07, 2003 at 11:38:41PM +0000, Jason Gloudon wrote:
> # New Ticket Created by  Jason Gloudon 
> # Please include the string:  [perl #21508]
> # in the subject line of all future correspondence about this issue. 
> # <URL: http://rt.perl.org/rt2/Ticket/Display.html?id=21508 >
> 
> 
> 
> This adds still more ops and re-organizes register use to avoid potential
> conflicts in register use between the main .jit code and the helper routines.
> More registers are available for allocation.
> 
> Some of the new ops are commented out. They really need a constant pool to
> implement them correctly. It would be nice if the constant pool was more
> generic, but I will probably want to work on the vtable functions before that.

The missing patch file.

-- 
Jason
Index: jit/sun4/core.jit
===================================================================
RCS file: /cvs/public/parrot/jit/sun4/core.jit,v
retrieving revision 1.3
diff -u -r1.3 core.jit
--- jit/sun4/core.jit   4 Mar 2003 15:58:11 -0000       1.3
+++ jit/sun4/core.jit   7 Mar 2003 23:34:05 -0000
@@ -45,22 +45,24 @@
     Parrot_set_x_x s/<_N>/_n/ s/ISR/FSR/
 }
 
-TEMPLATE Parrot_set_x_xc {
+Parrot_set_i_ic {
+    Parrot_set_x_x s/<_N>/_i/
+}
+
+Parrot_set_n_ic {
     if(MAP[1]){
-       jit_emit_load<_N>(jit_info, interpreter, 2, MAP[1]);
+       jit_emit_load_n(jit_info, interpreter, 2, MAP[1]);
+        emitm_fitod(NATIVECODE, MAP[1], MAP[1]);
     }
     else {
-       jit_emit_load<_N>(jit_info, interpreter, 2, ISR1);
-       jit_emit_store<_N>(jit_info, interpreter, 1, ISR1);
+       jit_emit_load_n(jit_info, interpreter, 2, FSR1);
+        emitm_fitod(NATIVECODE, FSR1, FSR1);
+       jit_emit_store_n(jit_info, interpreter, 1, FSR1);
     }
 }
 
-Parrot_set_i_ic {
-    Parrot_set_x_xc s/<_N>/_i/
-}
-
 Parrot_set_n_nc {
-    Parrot_set_x_xc s/<_N>/_n/ s/ISR/FSR/
+    Parrot_set_x_x s/<_N>/_n/ s/ISR/FSR/
 }
 
 Parrot_set_n_i {
@@ -132,13 +134,13 @@
     }
     else {
         arg2 = ISR2;
-        jit_emit_load<_N>(jit_info, interpreter, 2, ISR2);
+        jit_emit_load<_N>(jit_info, interpreter, 2, arg2);
     }
 
     emitm_<op>(NATIVECODE, arg1, arg2, arg1);
 
     if(!MAP[1]){
-        jit_emit_store<_N>(jit_info, interpreter, 1, ISR1);
+        jit_emit_store<_N>(jit_info, interpreter, 1, arg1);
     }
 }
 
@@ -178,7 +180,354 @@
     Parrot_binop_x_x s/<op>/fdivd/ s/<_N>/_n/
 }
 
-Parrot_if_i_ic {
+TEMPLATE Parrot_binop_i_xc {
+    int arg1;
+
+    if(MAP[1]){
+        arg1 = MAP[1];
+    }
+    else {
+        arg1 = ISR1;
+        jit_emit_load_i(jit_info, interpreter, 1, arg1);
+    }
+
+    if(emitm_simm13_const(*INT_CONST[2])){
+        emitm_<op>_i(NATIVECODE, arg1, *INT_CONST[2], arg1);
+    }
+    else {
+        jit_emit_load_i(jit_info, interpreter, 2, ISR1);
+        emitm_<op>_r(NATIVECODE, arg1, ISR1, arg1);
+    }
+
+    if(!MAP[1]){
+        jit_emit_store_i(jit_info, interpreter, 1, arg1);
+    }
+}
+
+Parrot_add_i_ic {
+    Parrot_binop_i_xc s/<op>/add/
+}
+
+Parrot_sub_i_ic {
+    Parrot_binop_i_xc s/<op>/sub/
+}
+
+Parrot_bor_i_ic {
+    Parrot_binop_i_xc s/<op>/or/
+}
+
+Parrot_band_i_ic {
+    Parrot_binop_i_xc s/<op>/and/
+}
+
+Parrot_bxor_i_ic {
+    Parrot_binop_i_xc s/<op>/xor/
+}
+
+Parrot_sub_n_nc {
+    Parrot_binop_x_x s/<op>/faddd/ s/ISR/FSR/ s/<_N>/_n/
+}
+
+Parrot_sub_n_nc {
+    Parrot_binop_x_x s/<op>/fsubd/ s/ISR/FSR/ s/<_N>/_n/
+}
+
+Parrot_mul_n_nc {
+    Parrot_binop_x_x s/<op>/fmuld/ s/ISR/FSR/ s/<_N>/_n/
+}
+
+Parrot_div_n_nc {
+    Parrot_binop_x_x s/<op>/fdivd/ s/ISR/FSR/ s/<_N>/_n/
+}
+
+TEMPLATE Parrot_binop_x_x_x {
+    int arg2, arg3;
+    
+    /* Generate load if needed */
+    if(MAP[2]){
+        arg2 = MAP[2];
+    }
+    else {
+        arg2 = ISR1;
+        jit_emit_load<_N>(jit_info, interpreter, 2, arg2);
+    }
+
+    /* Generate load if needed */
+    if (MAP[3]) {
+        arg3 = MAP[3];
+    }
+    else {
+        arg3 = ISR2;
+        jit_emit_load<_N>(jit_info, interpreter, 3, arg3);
+    }
+
+    /* Destination is a register */
+    if (MAP[1]) {
+        emitm_<op>(NATIVECODE, arg2, arg3, MAP[1]);
+    }
+    /* Destination is memory */
+    else {
+        emitm_<op>(NATIVECODE, arg2, arg3, ISR1);
+        jit_emit_store<_N>(jit_info, interpreter, 1, ISR1);
+    }
+}
+
+Parrot_add_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/add_r/ s/<_N>/_i/
+}
+
+Parrot_sub_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/sub_r/ s/<_N>/_i/
+}
+
+Parrot_band_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/and_r/ s/<_N>/_i/
+}
+
+Parrot_bor_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/or_r/ s/<_N>/_i/
+}
+
+Parrot_bxor_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/xor_r/ s/<_N>/_i/
+}
+
+Parrot_shl_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/sll_r/ s/<_N>/_i/
+}
+
+Parrot_shr_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/sra_r/ s/<_N>/_i/
+}
+
+Parrot_lsr_i_ic_ic {
+    Parrot_binop_x_x_x s/<op>/srl_r/ s/<_N>/_i/
+}
+
+Parrot_add_n_nc_nc {
+    Parrot_binop_x_x_x s/<op>/faddd/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_sub_n_nc_nc {
+    Parrot_binop_x_x_x s/<op>/fsubd/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_mul_n_nc_nc {
+    Parrot_binop_x_x_x s/<op>/fmuld/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_div_n_nc_nc {
+    Parrot_binop_x_x_x s/<op>/fdivd/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_add_i_i_ic {
+    Parrot_binop_x_x_x s/<op>/add_r/ s/<_N>/_i/
+}
+
+Parrot_sub_i_i_ic {
+    Parrot_binop_x_x_x s/<op>/sub_r/ s/<_N>/_i/
+}
+
+Parrot_bor_i_i_ic {
+    Parrot_binop_x_x_x s/<op>/or_r/ s/<_N>/_i/
+}
+
+Parrot_bxor_i_i_ic {
+    Parrot_binop_x_x_x s/<op>/xor_r/ s/<_N>/_i/
+}
+
+Parrot_band_i_i_ic {
+    Parrot_binop_x_x_x s/<op>/and_r/ s/<_N>/_i/
+}
+
+Parrot_add_n_n_nc {
+    Parrot_binop_x_x_x s/<op>/faddd/ s/<_N>/_n/
+}
+
+Parrot_sub_n_n_nc {
+    Parrot_binop_x_x_x s/<op>/fsubd/ s/<_N>/_n/
+}
+
+Parrot_mul_n_n_nc {
+    Parrot_binop_x_x_x s/<op>/fmuld/ s/<_N>/_n/
+}
+
+Parrot_div_n_n_nc {
+    Parrot_binop_x_x_x s/<op>/fdivd/ s/<_N>/_n/
+}
+
+Parrot_add_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/add_r/ s/<_N>/_i/
+}
+
+Parrot_sub_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/sub_r/ s/<_N>/_i/
+}
+
+Parrot_bor_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/or_r/ s/<_N>/_i/
+}
+
+Parrot_bxor_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/xor_r/ s/<_N>/_i/
+}
+
+Parrot_band_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/and_r/ s/<_N>/_i/
+}
+
+Parrot_shl_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/sll_r/ s/<_N>/_i/
+}
+
+Parrot_shr_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/sra_r/ s/<_N>/_i/
+}
+
+Parrot_lsr_i_ic_i {
+    Parrot_binop_x_x_x s/<op>/srl_r/ s/<_N>/_i/
+}
+
+Parrot_add_n_nc_n {
+    Parrot_binop_x_x_x s/<op>/faddd/ s/<_N>/_n/
+}
+
+Parrot_sub_n_nc_n {
+    Parrot_binop_x_x_x s/<op>/fsubd/ s/<_N>/_n/
+}
+
+Parrot_mul_n_nc_n {
+    Parrot_binop_x_x_x s/<op>/fmuld/ s/<_N>/_n/
+}
+
+Parrot_div_n_nc_n {
+    Parrot_binop_x_x_x s/<op>/fdivd/ s/<_N>/_n/
+}
+
+Parrot_add_i_i_i {
+    Parrot_binop_x_x_x s/<op>/add_r/ s/<_N>/_i/
+}
+
+Parrot_sub_i_i_i {
+    Parrot_binop_x_x_x s/<op>/sub_r/ s/<_N>/_i/
+}
+
+Parrot_bor_i_i_i {
+    Parrot_binop_x_x_x s/<op>/or_r/ s/<_N>/_i/
+}
+
+Parrot_bxor_i_i_i {
+    Parrot_binop_x_x_x s/<op>/xor_r/ s/<_N>/_i/
+}
+
+Parrot_band_i_i_i {
+    Parrot_binop_x_x_x s/<op>/and_r/ s/<_N>/_i/
+}
+
+Parrot_shl_i_i_i {
+    Parrot_binop_x_x_x s/<op>/sll_r/ s/<_N>/_i/
+}
+
+Parrot_shr_i_i_i {
+    Parrot_binop_x_x_x s/<op>/sra_r/ s/<_N>/_i/
+}
+
+Parrot_lsr_i_i_i {
+    Parrot_binop_x_x_x s/<op>/srl_r/ s/<_N>/_i/
+}
+
+Parrot_sub_n_n_n {
+    Parrot_binop_x_x_x s/<op>/fsubd/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_add_n_n_n {
+    Parrot_binop_x_x_x s/<op>/faddd/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_mul_n_n_n {
+    Parrot_binop_x_x_x s/<op>/fmuld/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+Parrot_div_n_n_n {
+    Parrot_binop_x_x_x s/<op>/fdivd/ s/<_N>/_n/ s/ISR/FSR/
+}
+
+; 
+;Parrot_neg_n {
+;    if(MAP[1]){
+;        emitm_fnegs(NATIVECODE, MAP[1], MAP[1]);
+;    }
+;    else {
+;        jit_emit_load_n(jit_info, interpreter, 1, FSR1);
+;        emitm_fnegs(NATIVECODE, FSR1, FSR1);
+;        jit_emit_store_n(jit_info, interpreter, 1, FSR1);
+;    }
+;}
+
+TEMPLATE Parrot_unop_x_x {
+    if(MAP[1] && MAP[2]){
+        emitm_<op>(NATIVECODE, MAP[2], MAP[1]);
+    }
+    else if(MAP[1]){
+        jit_emit_load<_N>(jit_info, interpreter, 2, MAP[1]);
+        emitm_<op>(NATIVECODE, MAP[1], MAP[1]);
+    }
+    else {
+        jit_emit_load<_N>(jit_info, interpreter, 2, ISR1);
+        emitm_<op>(NATIVECODE, ISR1, ISR1);
+        jit_emit_store<_N>(jit_info, interpreter, 1, ISR1);
+    }
+}
+
+TEMPLATE Parrot_unop_x_nc {
+    if(MAP[1] && MAP[2]){
+        emitm_<op>(NATIVECODE, MAP[2], MAP[1]);
+    }
+    else if(MAP[1]){
+        jit_emit_load<_N>(jit_info, interpreter, 2, MAP[1]);
+        emitm_<op>(NATIVECODE, MAP[1], MAP[1]);
+    }
+    else {
+        jit_emit_load<_N>(jit_info, interpreter, 2, ISR1);
+        emitm_<op>(NATIVECODE, ISR1, ISR1);
+        jit_emit_store<_N>(jit_info, interpreter, 1, ISR1);
+    }
+}
+
+;Parrot_neg_n_nc {
+;    Parrot_unop_x_x s/<op>/fnegs/ s/<_N>/_n/ s/ISR/FSR/
+;}
+
+;Parrot_neg_n_n {
+;    Parrot_unop_x_x s/<op>/fnegs/ s/<_N>/_n/ s/ISR/FSR/
+;}
+
+TEMPLATE Parrot_abs_nx_nx {
+    if(MAP[1] && MAP[2]){
+        emitm_fabss(NATIVECODE, MAP[2], MAP[1]);
+        emitm_fmovs(NATIVECODE, MAP[2] + 1, MAP[1] + 1);
+    }
+    else if(MAP[1]){
+        jit_emit_load_n(jit_info, interpreter, 2, MAP[1]);
+        emitm_fabss(NATIVECODE, MAP[1], MAP[1]);
+    }
+    else {
+        jit_emit_load_n(jit_info, interpreter, 2, FSR1);
+        emitm_fabss(NATIVECODE, FSR1, FSR1);
+        jit_emit_store_n(jit_info, interpreter, 1, FSR1);
+    }
+}
+
+Parrot_abs_n_n {
+    Parrot_abs_nx_nx
+}
+
+Parrot_abs_n_nc {
+    Parrot_abs_nx_nx
+}
+
+
+TEMPLATE Parrot_if_ix_x {
     if(MAP[1]){
        emitm_subcc_r(NATIVECODE, MAP[1], emitm_g(0), emitm_g(0));
     }
@@ -187,8 +536,20 @@
        emitm_subcc_r(NATIVECODE, ISR1, emitm_g(0), emitm_g(0));
     }
 
-    Parrot_jit_bicc(jit_info, emitm_bne, 0, *INT_CONST[2]);
+    Parrot_jit_bicc(jit_info, emitm_<a>, 0, *INT_CONST[2]);
     emitm_nop(NATIVECODE);
+}
+
+Parrot_if_ic_ic {
+    Parrot_if_ix_x s/<a>/bne/
+}
+
+Parrot_if_i_ic {
+    Parrot_if_ix_x s/<a>/bne/
+}
+
+Parrot_unless_i_ic {
+    Parrot_if_ix_x  s/<a>/be/
 }
 
 Parrot_branch_ic {
Index: jit/sun4/jit_emit.h
===================================================================
RCS file: /cvs/public/parrot/jit/sun4/jit_emit.h,v
retrieving revision 1.22
diff -u -r1.22 jit_emit.h
--- jit/sun4/jit_emit.h 4 Mar 2003 15:58:11 -0000       1.22
+++ jit/sun4/jit_emit.h 7 Mar 2003 23:34:05 -0000
@@ -45,6 +45,8 @@
 #define emitm_simm13_max 4095
 #define emitm_simm13_min -4096
 
+#define emitm_simm13_const(val) (((val) >= emitm_simm13_min) && ((val) < 
emitm_simm13_max))
+
 #define emitm_branch_max 8388607
 #define emitm_branch_min -8388608
 
@@ -240,11 +242,16 @@
 #define emitm_fsubd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0106, rs2)
 #define emitm_fmuld(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0112, rs2)
 #define emitm_fdivd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0116, rs2)
+#define emitm_fabss(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0011, rs)
+#define emitm_fnegs(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0005, rs)
 
 /* Floating <-> Integer Conversion */
 #define emitm_fitod(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0310, rs)
 #define emitm_fdtoi(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0322, rs)
 
+/* Floating point tests */
+#define emitm_fcmpd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0112, rs2)
+
 /* Jump and Link */
 
 #define emitm_jumpl_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 070, rs1, 0, rs2)
@@ -308,12 +315,17 @@
 /* The register containing the address of the opmap */
 #define Parrot_jit_opmap emitm_i(3)
 
-/* This scratch register is used for certain address calculations */
-#define ISR1 emitm_l(5)
-#define ISR2 emitm_l(6)
+/* These registers should be used only in .jit ops and not helper routines
+ *   in jit_emit.h
+ */
+#define ISR1 emitm_i(4)
+#define ISR2 emitm_i(5)
 #define FSR1 emitm_f(0)
 #define FSR2 emitm_f(2)
 
+/* This register can be used only in jit_emit.h calculations */
+#define XSR1 emitm_l(0)
+
 #define Parrot_jit_regbase_ptr(i) &((i)->ctx.int_reg.registers[0])
 
 /* The offset of a Parrot register from the base register */
@@ -329,21 +341,21 @@
 
     /* Construct the starting address of the byte code */
     emitm_sethi(jit_info->native_ptr, emitm_hi22(interpreter->code->byte_code),
-        ISR2);
-    emitm_or_i(jit_info->native_ptr, ISR2,
-        emitm_lo10(interpreter->code->byte_code), ISR2);
+        XSR1);
+    emitm_or_i(jit_info->native_ptr, XSR1,
+        emitm_lo10(interpreter->code->byte_code), XSR1);
 
     /* Calculates the offset into op_map shadow array
      * assuming sizeof(opcode_t) == sizeof(opmap array entry) */
-    emitm_sub_r(jit_info->native_ptr, reg_num, ISR2,
-                ISR2);
+    emitm_sub_r(jit_info->native_ptr, reg_num, XSR1,
+                XSR1);
 
     /* Load the address of the native code from op_map */
-    emitm_ld_r(jit_info->native_ptr, Parrot_jit_opmap, ISR2,
-               ISR2);
+    emitm_ld_r(jit_info->native_ptr, Parrot_jit_opmap, XSR1,
+               XSR1);
 
     /* This jumps to the address from op_map */
-    emitm_jumpl_i(jit_info->native_ptr, ISR2, 0, ISR2);
+    emitm_jumpl_i(jit_info->native_ptr, XSR1, 0, XSR1);
     emitm_nop(jit_info->native_ptr);
 }
 
@@ -402,8 +414,8 @@
                     constants[val]->u.number;
 
             /* Load double into integer registers */
-            emitm_sethi(jit_info->native_ptr, emitm_hi22(val), ISR2);
-            emitm_ldd_i(jit_info->native_ptr, ISR2, emitm_lo10(val),
+            emitm_sethi(jit_info->native_ptr, emitm_hi22(val), XSR1);
+            emitm_ldd_i(jit_info->native_ptr, XSR1, emitm_lo10(val),
                         hwreg);
             break;
 
@@ -486,19 +498,27 @@
                              int hwreg)
 {
     opcode_t op_type;
-    int val;
+    long val;
 
     op_type = interpreter->op_info_table[*jit_info->cur_op].types[param];
     val = jit_info->cur_op[param];
 
     switch(op_type){
+        case PARROT_ARG_IC:
+            /* Load integer into floating point registers - should use 
+               constant pool */
+            val = &jit_info->cur_op[param];
+            emitm_sethi(jit_info->native_ptr, emitm_hi22(val), XSR1);
+            emitm_ldf_i(jit_info->native_ptr, XSR1, emitm_lo10(val), hwreg);
+            break;
+
         case PARROT_ARG_NC:
             val = (int)&interpreter->code->const_table->
                     constants[val]->u.number;
 
-            /* Load double into integer registers */
-            emitm_sethi(jit_info->native_ptr, emitm_hi22(val), ISR2);
-            emitm_lddf_i(jit_info->native_ptr, ISR2, emitm_lo10(val),
+            /* Load double into floating point registers */
+            emitm_sethi(jit_info->native_ptr, emitm_hi22(val), XSR1);
+            emitm_lddf_i(jit_info->native_ptr, XSR1, emitm_lo10(val),
                         hwreg);
             break;
 
@@ -698,15 +718,44 @@
                  Parrot_jit_regbase, Parrot_jit_regoff(mem, interpreter), reg);
 }
 
+#  ifndef NO_JIT_VTABLE_OPS
+
+#    undef Parrot_jit_vtable1_op
+/*#    undef Parrot_jit_vtable1r_op
+#    undef Parrot_jit_vtable2rk_op
+#    undef Parrot_jit_vtable3k_op
+
+#    undef Parrot_jit_vtable_112_op
+#    undef Parrot_jit_vtable_221_op
+#    undef Parrot_jit_vtable_1121_op
+#    undef Parrot_jit_vtable_1123_op
+#    undef Parrot_jit_vtable_2231_op
+
+#    undef Parrot_jit_vtable_1r223_op
+#    undef Parrot_jit_vtable_1r332_op
+
+#    undef Parrot_jit_vtable_ifp_op
+#    undef Parrot_jit_vtable_unlessp_op
+#    undef Parrot_jit_vtable_newp_ic_op
+*/
+
+static void
+Parrot_jit_vtable1_op(Parrot_jit_info_t *jit_info,
+                      struct Parrot_Interp *interpreter)
+{
+}
+
+#endif /* NO_JIT_VTABLE_OPS */
+
 #else
 
 #  define REQUIRES_CONSTANT_POOL 0
-#  define INT_REGISTERS_TO_MAP 5
+#  define INT_REGISTERS_TO_MAP 6
 #  define FLOAT_REGISTERS_TO_MAP 6
 
 #ifndef JIT_IMCC
 char intval_map[INT_REGISTERS_TO_MAP] =
-    { emitm_l(0), emitm_l(1), emitm_l(2), emitm_l(3), emitm_l(4)
+    { emitm_l(1), emitm_l(2), emitm_l(3), emitm_l(4), emitm_l(5), emitm_l(6)
     };
 
 char floatval_map[] = 
@@ -714,7 +763,7 @@
     };
 #endif
 
-#define PRESERVED_INT_REGS 5
+#define PRESERVED_INT_REGS 6
 #define PRESERVED_FLOAT_REGS 0
 
 #endif

Reply via email to