05/01/04 01:22:32, Sam Vilain <[EMAIL PROTECTED]> wrote:
[STUFF] :)
In another post you mentions intel hyperthreading. Essentially, duplicate sets of registers within a single CPU.
Do these need to apply lock on every machine level entity that they access? No.
Why not?
Because they can only modify an entity if it is loaded into a register and the logic behind hyperthreading won't allow both register sets to load the same entity concurrently.
This seems generally common for SMT core CPUs (though some of them may allow multiple references in different threads on-chip and just keeps the data sync'd up--I've not looked), unfortunately, is untenable for Parrot. The hardware gets to throw massive amounts of parallelism at the problem, a luxury we, alas, don't have. (I'm pretty sure they also play some serious register remapping games and deferred & speculative execution tricks to not deadlock)
To do this would require that every time a PMC register was loaded that all the PMC registers of any other active interpreter in the interpreter group be scanned. Kind of a pricey operation.
--
Dan
--------------------------------------"it's like this"-------------------
Dan Sugalski even samurai
[EMAIL PROTECTED] have teddy bears and even
teddy bears get drunk
