# New Ticket Created by Jason Gloudon # Please include the string: [perl #16308] # in the subject line of all future correspondence about this issue. # <URL: http://rt.perl.org/rt2/Ticket/Display.html?id=16308 >
This adds logical shift right opcodes. They are essential for bit shifting negative values without sign extension getting in the way. -- Jason -- attachment 1 ------------------------------------------------------ url: http://rt.perl.org/rt2/attach/34429/28142/d00f4b/lsr.diff
Index: core.ops =================================================================== RCS file: /cvs/public/parrot/core.ops,v retrieving revision 1.199 diff -u -r1.199 core.ops --- core.ops 18 Aug 2002 23:57:37 -0000 1.199 +++ core.ops 19 Aug 2002 21:12:45 -0000 @@ -2854,6 +2854,19 @@ ######################################## +=item B<lsr>(out INT, in INT, in INT) + +Set $1 to the value of $2 logically shifted right by $3 bits. + +=cut + +inline op lsr(out INT, in INT, in INT) { + $1 = (INTVAL)((UINTVAL)$2 >> $3); + goto NEXT(); +} + +######################################## + =item B<bxor>(inout INT, in INT) =item B<bxor>(inout PMC, in INT) Index: t/op/bitwise.t =================================================================== RCS file: /cvs/public/parrot/t/op/bitwise.t,v retrieving revision 1.5 diff -u -r1.5 bitwise.t --- t/op/bitwise.t 27 Jul 2002 20:18:12 -0000 1.5 +++ t/op/bitwise.t 19 Aug 2002 21:12:46 -0000 @@ -1,6 +1,6 @@ #perl -w -use Parrot::Test tests => 18; +use Parrot::Test tests => 20; output_is(<<'CODE', <<'OUTPUT', "shr_i_i (>>)"); set I0, 0b001100 @@ -70,6 +70,37 @@ CODE 6 5 +OUTPUT + +# The crux of this test is that a proper logical right shift +# will clear the most significant bit, so the shifted value +# will be a positive value on any 2's or 1's complement CPU +output_is(<<'CODE', <<'OUTPUT', "lsr_ic_ic (<<)"); + lsr I2, -40, 1 + lt I2, 0, BAD + print "OK\n" + end +BAD: + print "Not OK" + print "\n" + end +CODE +OK +OUTPUT + +output_is(<<'CODE', <<'OUTPUT', "lsr_i_i (<<)"); + set I0, -40 + set I1, 1 + lsr I2, I0, I1 + lt I2, 0, BAD + print "OK\n" + end +BAD: + print "Not OK" + print "\n" + end +CODE +OK OUTPUT output_is(<<'CODE', <<'OUTPUT', "shl_i_i (<<)");