Well, the long and the short of it seems to be that no one before you
ever tried to run Postgres on a multi-CPU PowerPC machine :-(

Some digging around on the net made it clear that we were missing
synchronization instructions that are critical for access to shared
memory in a multi-CPU system.  I have applied the attached patch to
CVS tip (7.3beta2-almost).  It looks like it will apply cleanly to
7.2.*, so please try it out (with optimization re-enabled) and let
us know what you see!

(I have confirmed that this patch causes no trouble on LinuxPPC and
OS X 10.1, but I do not have a multi-CPU machine to see if it really
solves the problem...)

                        regards, tom lane


*** src/backend/storage/lmgr/s_lock.c.orig      Thu Jun 20 16:29:35 2002
--- src/backend/storage/lmgr/s_lock.c   Fri Sep 20 20:11:53 2002
***************
*** 115,120 ****
--- 115,123 ----
  /* used in darwin. */
  /* We key off __APPLE__ here because this function differs from
   * the LinuxPPC implementation only in compiler syntax.
+  *
+  * NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
+  * an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
   */
  static void
  tas_dummy()
***************
*** 134,139 ****
--- 137,143 ----
  fail:         li              r3,1            \n\
                        blr                             \n\
  success:                                              \n\
+                       isync                           \n\
                        li              r3,0            \n\
                        blr                                     \n\
  ");
***************
*** 158,163 ****
--- 162,168 ----
  fail:         li              3,1             \n\
                        blr                             \n\
  success:                                              \n\
+                       isync                           \n\
                        li              3,0                     \n\
                        blr                                     \n\
  ");
*** src/include/storage/s_lock.h.orig   Mon Sep  2 09:50:09 2002
--- src/include/storage/s_lock.h        Fri Sep 20 20:11:46 2002
***************
*** 217,222 ****
--- 217,237 ----
  #endif         /* defined(__mc68000__) && defined(__linux__) */
  
  
+ #if defined(__ppc__) || defined(__powerpc__)
+ /*
+  * We currently use out-of-line assembler for TAS on PowerPC; see s_lock.c.
+  * S_UNLOCK is almost standard but requires a "sync" instruction.
+  */
+ #define S_UNLOCK(lock)        \
+ do \
+ {\
+       __asm__ __volatile__ (" sync \n"); \
+       *((volatile slock_t *) (lock)) = 0; \
+ } while (0)
+ 
+ #endif /* defined(__ppc__) || defined(__powerpc__) */
+ 
+ 
  #if defined(NEED_VAX_TAS_ASM)
  /*
   * VAXen -- even multiprocessor ones

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