On Thu, May 25, 2023 at 11:51 AM Tom Lane <t...@sss.pgh.pa.us> wrote: > Andres Freund <and...@anarazel.de> writes: > > On 2023-05-24 17:44:36 -0400, Tom Lane wrote: > > So it looks like the only certain problem is PA-RISC - which I personally > > wouldn't include in "relevant" :), with some evaluation needed for 32bit > > mips > > and old arms. > > You'll no doubt be glad to hear that I'll be retiring chickadee > in the very near future.
. o O { I guess chickadee might have been OK anyway, along with e.g. antique low-end SGI MIPS gear etc of "workstation"/"desktop" form that any collector is likely to have still running, because they only had one CPU (unlike their Vogon-spaceship-sized siblings). As long as they had 64 bit load/store instructions, those couldn't be 'divided' by an interrupt, so scheduler switches shouldn't be able to tear them, AFAIK? }