On Tue, Feb 24, 2026 at 2:22 PM Lukas Fittl <[email protected]> wrote: > > On Mon, Feb 23, 2026 at 6:02 PM John Naylor <[email protected]> wrote: > > > > On Tue, Feb 24, 2026 at 5:28 AM Andres Freund <[email protected]> wrote: > > > On 2026-02-23 16:24:57 +0100, David Geier wrote: > > > > The code wasn't compiling properly on Windows because __x86_64__ is not > > > > defined in Visual C++. I've changed the code to use > > > > > > > > #if defined(__x86_64__) || defined(_M_X64) > > > > > > Independently of this patchset I wonder if it'd be worth introducing a > > > PG_ARCH_X64 or such, to avoid this kind of thing. > > > > +1 > > > > I've already borrowed USE_SSE2 for this meaning in commit b9278871f, > > but that's conflating two different things and I'd actually prefer the > > above, plus one that includes 32-bit as well. > > +1, would be good to have a consistent definition for this, I hadn't > realized this differs between platforms. John, do you want to take > care of adding that since you recently added USE_SSE2?
In the attached I tried like this: /* * compiler-independent macros for CPU architecture */ #if defined(__x86_64__) || defined(_M_X64) #define PG_ARCH_X64 #elif defined(__i386__) || defined(_M_IX86) #define PG_ARCH_X32 #elif defined(__aarch64__) || defined(_M_ARM64) #define PG_ARCH_ARM64 #elif defined(__arm__) || defined(__arm) || defined(_M_ARM) #define PG_ARCH_ARM32 #endif and adjusted a couple places to suit. The Arm ones aren't used yet so I could leave them out for now. > > is_rdtscp_available() is an easy thing to delegate to my patch, but I > > agree it would be easier if that was abstracted a bit more so that a > > different leaf can be passed each time. The latter could also be used > > to simplify the frequency and hypervisor stuff as well. > > Yeah, that makes sense, agreed it'd be nice to centralize the CPU > architecture specific code that utilizes cpuid/etc. > > Looking at your v5/0002 over there, that should work well. As you > note, is_rdtscp_available is an easy delegation to your logic - I > think we can probably always fetch the 0x80000001 leaf to check for > RDTSCP presence in the proposed set_x86_features? I think that would work. Your pg_cpuid() looks like the abstraction we need. I think that would also allow my v5/0002 to avoid worrying about ordering dependencies. (It resets to check leaf 7, but some AVX features that we don't use need leaf 1) -- John Naylor Amazon Web Services
diff --git a/src/include/c.h b/src/include/c.h index fb0ea1bc680..c0c46ab2c8c 100644 --- a/src/include/c.h +++ b/src/include/c.h @@ -1268,11 +1268,24 @@ typedef struct PGAlignedXLogBlock PGAlignedXLogBlock; ((underlying_type) (expr)) #endif +/* + * compiler-independent macros for CPU architecture + */ +#if defined(__x86_64__) || defined(_M_X64) +#define PG_ARCH_X64 +#elif defined(__i386__) || defined(_M_IX86) +#define PG_ARCH_X32 +#elif defined(__aarch64__) || defined(_M_ARM64) +#define PG_ARCH_ARM64 +#elif defined(__arm__) || defined(__arm) || defined(_M_ARM) +#define PG_ARCH_ARM32 +#endif + /* * SSE2 instructions are part of the spec for the 64-bit x86 ISA. We assume * that compilers targeting this architecture understand SSE2 intrinsics. */ -#if (defined(__x86_64__) || defined(_M_AMD64)) +#if defined(PG_ARCH_X64) #define USE_SSE2 /* diff --git a/src/port/pg_cpu_x86.c b/src/port/pg_cpu_x86.c index 0c292c0223a..81470f0b0b5 100644 --- a/src/port/pg_cpu_x86.c +++ b/src/port/pg_cpu_x86.c @@ -20,7 +20,7 @@ #include "c.h" -#if defined(USE_SSE2) || defined(__i386__) +#if defined(PG_ARCH_X64) || defined(PG_ARCH_X32) #if defined(HAVE__GET_CPUID) || defined(HAVE__GET_CPUID_COUNT) #include <cpuid.h> @@ -114,4 +114,4 @@ pg_crc32c (*pg_comp_crc32c) (pg_crc32c crc, const void *data, size_t len) = pg_c #endif -#endif /* defined(USE_SSE2) || defined(__i386__) */ +#endif /* defined(PG_ARCH_X64) || defined(PG_ARCH_X32) */
