Thanks for the reference. We now have the possibility to create small kernels. So we will start a new phd on improving such an architecture (tooling) and we want to see what we can do. One path is can have miniCog that can co evolve with the kernel and even run way slower.
Stef On Mon, Jun 19, 2017 at 5:55 PM, Ben Coman <b...@openinworld.com> wrote: > On Thu, Jun 15, 2017 at 9:32 PM, Jérémie Regnault > <jeremie.regna...@outlook.com> wrote: >> >> Hi, I'm working on Pharo deployment in a read-only environment, and I >> want to know what behavior you want Pharo to adopt. If you could take >> 5-10 minutes to fill my survey, it would be nice : >> https://goo.gl/forms/8S7w4079NDfBrsVu1 > > > Done. Now I provide my requested suggestion here since theres more room and > more feedback. > > Code at the level of individual methods should be > source-content-addressable, by a hash similar to but not necessarily > identical to git internals > (https://git-scm.com/book/en/v1/Git-Internals-Git-Objects). Then code can > be simultaneously stored to multiple locations - memory and/or separate > writable local file as a cache, plus a remote content-addressable database > and/or POSTing to a simple HTTP server. Code lookup can equally search > multiple locations, update a LRU cache and easily purge it if memory is > constrained, since the identity of the method source remains the *same* in > all cases. > > Further, I envisage an IoT future with Pharo running bare-metal on embedded > microcontrollers** that don't even have a file system, but do have ample > internet bandwidth. When you connect your remote-system-browser to it from > your desktop, the microcontroller doesn't even need to look up the source > code - it just passes the method's source-content-hash to the desktop and > the desktop looks up and displays the source code. Code compilation for the > microcontroller might be done on the desktop and dynamically downloaded and > installed per method in the microcontroller - just bytecode and > source-content-hash! The microcontroller never sees the source, and the > space saving from removing the compiler facilitates smaller targets. > > cheers -ben > > > > **P.S. The latest cool-kid on the block is the Expressif ESP32 > - 240 MHz dual core Tensilica LX6 microcontroller, 600 DMIPS*** > - Integrated 448kB ROM > - Integrated 520 KB SRAM > - Up to 16MB QPSI flash/SRAM > > The Sparkfun ESP32 Thing is available with 4MB flash for US$20. > https://www.sparkfun.com/products/13907 > and are obviously expected to get more powerful and cheaper in the future - > sufficient to directly run Pharo? > > We should cater for such possibilities! Invent the future! > > > *** equivalent to 1997 Mac_G3/266MHz > (https://www.frc.ri.cmu.edu/~hpm/book97/ch3/processor.list.txt) >