From: Michel Dänzer <michel.daen...@amd.com>
Without this, the first iteration of the loop can start at any point of
the display refresh cycle. If it's close to the next vertical blank
period, it may be too late for the swap / wait to hit the target MSC,
which would result in at least a warning.
Signed-off-by: Michel Dänzer <michel.daen...@amd.com>
---
tests/spec/glx_oml_sync_control/timing.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/tests/spec/glx_oml_sync_control/timing.c
b/tests/spec/glx_oml_sync_control/timing.c
index ec400ca07..82da43550 100644
--- a/tests/spec/glx_oml_sync_control/timing.c
+++ b/tests/spec/glx_oml_sync_control/timing.c
@@ -139,6 +139,15 @@ draw(Display *dpy)
piglit_set_timeout(5, PIGLIT_FAIL);
+ if (use_swapbuffers) {
+ if (!swap_buffers_msc(dpy, last_sbc, &last_sbc, last_msc + 1,
+ 0, 0, &last_ust, &last_msc, &last_sbc,
+ &result))
+ return PIGLIT_FAIL;
+ } else {
+ wait_for_msc(dpy, last_msc + 1, 0, 0, &last_ust, &last_msc,
+ &last_sbc, &result);
+ }
for (i = 0; i < loops; i++) {
int64_t new_ust = 0xd0, new_msc = 0xd0, new_sbc = 0xd0;
--
2.11.0
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